On 2015/10/12 18:25, Thomas Gleixner wrote:
> On Mon, 12 Oct 2015, Daniel J Blueman wrote:
>> Another approach which may be suitable without changing SRAT parsing to be
>> after the memory allocator is up, is to exploit the associativity of the
>> bottom APIC ID bits.
>
> What's the problem with moving (SRAT/ACPI/whatever) APIC parsing after
> the memory allocator is up and available?
Hi Thomas,
The work flow is as below at boot:
1) figure out memory NUMA topology info by walking ACPI table or probing
AMD northbirdge.
2) initialize memory allocation based on memory NUMA topology.
And to make code simple, it also scan CPU NUMA topology in step 1, so
we could avoid walking ACPI tables twice. On the other hand, there are
several subsystems having code pattern as follow before booting APs.
up:
for_each_possible_cpu(cpu)
alloc_page_node(size, cpu_to_node(cpu))
So it's a little hard to find a suitable hook point to delay CPU NUMA
topology scanning after memory allocator is ready.
Thanks,
Gerry
>
> Thanks,
>
> tglx
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