With current code, for commands like cmd5/cmd7 which transfer without data,
function sdhci_set_transfer_mode will just return without updating the
transfer setting. So the Transfer Mode Register (offset 0x3E) still keep
previous setting, which may be wrong since some bits (0x3E<5:0>) may have
been set unexpectedly.
For example, cmd5 following cmd18/cmd25 will have timeout error
since auto cmd23 has been enabled.
This bug will lead to timeout error during emmc suspend/resume
when cmd5 is called to sleep/awake emmc.
And this fix has been verified on sdhci-pxav3 platform.
Reviewed By: Girish K S <girish.shivananja...@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei....@marvell.com>
Signed-off-by: Jialing Fu <j...@marvell.com>
Signed-off-by: Tim Wang <wan...@marvell.com>
Signed-off-by: Kevin Liu <kl...@marvell.com>
Change-Id: I2e53475fe7557ad4026f2a20b1727cb7ed34086e
---
drivers/mmc/host/sdhci.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 3bb9b88..8a14927 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -886,8 +886,21 @@ static void sdhci_set_transfer_mode(struct sdhci_host
*host,
u16 mode;
struct mmc_data *data = cmd->data;
- if (data == NULL)
+ if (!data) {
+ if (cmd->opcode == MMC_SEND_TUNING_BLOCK ||
+ cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200)
+ /*
+ * The tuning block is sent by the card to the host
+ * controller. So we set the TRNS_READ bit in the
+ * Transfer Mode register. This also takes care of
+ * setting DMA Enable and Multi Block Select in the
+ * same register to 0.
+ */
+ sdhci_writew(host, SDHCI_TRNS_READ,
SDHCI_TRANSFER_MODE);
+ else
+ sdhci_writew(host, 0, SDHCI_TRANSFER_MODE);
return;
+ }
WARN_ON(!host->data);
@@ -1860,13 +1873,6 @@ static int sdhci_execute_tuning(struct mmc_host *mmc,
u32 opcode)
SDHCI_BLOCK_SIZE);
}
- /*
- * The tuning block is sent by the card to the host controller.
- * So we set the TRNS_READ bit in the Transfer Mode register.
- * This also takes care of setting DMA Enable and Multi Block
- * Select in the same register to 0.
- */
- sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
sdhci_send_command(host, &cmd);
--
1.7.9.5
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