At 50 Mhz SD_CLK period,
the max timeout value = 2^27 * SD_CLK period ~= 2.69 sec.
When we has quirk SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK, the timeout_clk
should be calculate according to the real clock run by card. Which is
less than 50 MHz. So update the timeout clock when the clock was actually
enabled and used.
Signed-off-by: Haijun Zhang <haijun.zh...@freescale.com>
---
drivers/mmc/host/sdhci.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 7a7fb4f..c614c31 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1238,6 +1238,10 @@ clock_set:
clk |= SDHCI_CLOCK_CARD_EN;
sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+ if (real_div && (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) {
+ host->timeout_clk = host->mmc->actual_clock / 1000;
+ host->mmc->max_discard_to = (1 << 27) / host->timeout_clk;
+ }
out:
host->clock = clock;
}
--
1.8.0
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