At 50 Mhz SD_CLK period,
the max timeout value = 2^27 * SD_CLK period ~= 2.69 sec.
When we has quirk SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK, the timeout_clk
should be calculate according to the real clock run by card. Which is
less than 50 MHz. So update the timeout clock when the clock was actually
enabled and used.
Signed-off-by: Haijun Zhang <haijun.zh...@freescale.com>
---
drivers/mmc/host/sdhci-esdhc.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index a2a0642..e70c4e6 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -73,6 +73,7 @@ static inline void esdhc_set_clock(struct sdhci_host *host,
unsigned int clock,
dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
clock, host_clock / pre_div / div);
+ host->mmc->actual_clock = host->max_clk / pre_div / div;
pre_div >>= 1;
div--;
@@ -82,6 +83,11 @@ static inline void esdhc_set_clock(struct sdhci_host *host,
unsigned int clock,
| (pre_div << ESDHC_PREDIV_SHIFT));
sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
mdelay(1);
+
+ if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) {
+ host->timeout_clk = host->mmc->actual_clock / 1000;
+ host->mmc->max_discard_to = (1 << 27) / host->timeout_clk;
+ }
out:
host->clock = clock;
}
--
1.8.0
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