On Fri, May 05, 2017 at 11:17:18AM -0700, Ricardo Neri wrote: > User-Mode Instruction Prevention is a security feature present in new > Intel processors that, when set, prevents the execution of a subset of > instructions if such instructions are executed in user mode (CPL > 0). > Attempting to execute such instructions causes a general protection > exception. > > The subset of instructions comprises: > > * SGDT - Store Global Descriptor Table > * SIDT - Store Interrupt Descriptor Table > * SLDT - Store Local Descriptor Table > * SMSW - Store Machine Status Word > * STR - Store Task Register > > This feature is also added to the list of disabled-features to allow > a cleaner handling of build-time configuration. > > Cc: Andy Lutomirski <[email protected]> > Cc: Andrew Morton <[email protected]> > Cc: H. Peter Anvin <[email protected]> > Cc: Borislav Petkov <[email protected]> > Cc: Brian Gerst <[email protected]> > Cc: Chen Yucong <[email protected]> > Cc: Chris Metcalf <[email protected]> > Cc: Dave Hansen <[email protected]> > Cc: Fenghua Yu <[email protected]> > Cc: Huang Rui <[email protected]> > Cc: Jiri Slaby <[email protected]> > Cc: Jonathan Corbet <[email protected]> > Cc: Michael S. Tsirkin <[email protected]> > Cc: Paul Gortmaker <[email protected]> > Cc: Peter Zijlstra <[email protected]> > Cc: Ravi V. Shankar <[email protected]> > Cc: Shuah Khan <[email protected]> > Cc: Vlastimil Babka <[email protected]> > Cc: Tony Luck <[email protected]> > Cc: Paolo Bonzini <[email protected]> > Cc: Liang Z. Li <[email protected]> > Cc: Alexandre Julliard <[email protected]> > Cc: Stas Sergeev <[email protected]> > Cc: [email protected] > Cc: [email protected] > > Signed-off-by: Ricardo Neri <[email protected]> > --- > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/include/asm/disabled-features.h | 8 +++++++- > arch/x86/include/uapi/asm/processor-flags.h | 2 ++ > 3 files changed, 10 insertions(+), 1 deletion(-)
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