From: Ben Dooks
> On 10/04/14 11:49, Sergei Shtylyov wrote:
> > On 10-04-2014 13:20, David Laight wrote:
> >
> >>> It doesn't do any pin muxing. It switches SoC internal USB
> >>> signals between
> >>> USB controllers. The pins remain the same.
> >
> >> Doesn't something like that already happen for the companion USB1
> >> controllers for USB2 ports?
> >
> > Did you mean USB 1.1 and USB 2.0 controllers by USB1 and USB2?
Yes.
Why do you care which USB controller is driving the pins?
> >> That also doesn't sound like you are changing the PHY.
> >
> > I am changing one of the PHY registers that controls USB port
> > (Renesas calls it channel) multiplexing.
> >
> >> I'd have thought that would happen if you had a single controller
> >> that select between multiply PHY.
> >
> > No, it's not the case.
I realised that wasn't what you were doing, but at first it did seem
to be what you were doing.
> There is an interesting case, the USB3 shares a PHY with a SATA
> and the PCIE and SATA also share a PHY on the R8A7790.
Some of those look like pcb design decisions - so there is no dynamic
changing, just config time plumbing.
OTOH we are carrying PCIe using two SATA cables (the second carries the
clock) so I suspect some SoC system pcbs may be able to support SATA
or PCIe on the same connector).
David
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