> From: Kevin Hilman [mailto:khil...@deeprootsystems.com] > Sent: Thursday, May 14, 2009 12:10 PM > To: Kalle Jokiniemi
> Kalle Jokiniemi <kalle.jokini...@digia.com> writes: > > > The hardware SAVEANDRESTORE mechanism seems to leave > > USB HOST power domain permanently into active state > > after one transition from off to active state. > > Disabling for now. Some are is needed around USB host domain handling. There are a couple errata impacting different chip revs. Today in the older TI reference code this condition of a stuck on power domain does not happen. However, we are using a software supervised method to disable the power domain. May be this code has a bug or the hardware does around auto use for this domain. You will want TLL or host SAR activated to minimally work around a possible false cold reset issue. There is a window coming back from OFF where a reset will be thrown. Enabling SAR conclusively moves the internal window so there is no danger. The error is fairly easily seen so if you start taking resets know this is likely the root cause. What Rev of CPU is the issue occurring on? The USBTLL SAR in 3.0 and before silicon will case a deadlock on 2nd sleep attempt. On 3.1 and after its fixed. Regards, Richard W. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
