On Tue, 2011-06-28 at 10:10 +0200, Cousson, Benoit wrote:
> Hi Tomi,
>
> On 6/28/2011 8:40 AM, Valkeinen, Tomi wrote:
> > On Mon, 2011-06-27 at 18:33 +0200, Benoit Cousson wrote:
> >> Previously, main_clk was a fake clock node that was accessing the
> >> PRCM modulemode register. Since the module mode is directly
> >> controlled by the hwmod fmwk, these fake clock node are not
> >> needed anymore. The hwmod main_clk will point directly to the
> >> input clock node if applicable.
> >> For example, some IPs, like the GPIOs, do not have any functional
> >> clock and are using only the iclk. In that case, the main_clk
> >> field will be empty.
> >>
> >> In the case of the DSS, we can now consider all the optional clock as
> >> main clock.
> >> That will simplify greatly the driver management and the integration
> >> with hwmod.
> >>
> >> Signed-off-by: Benoit Cousson<b-cous...@ti.com>
> >> Cc: Tomi Valkeinen<tomi.valkei...@ti.com>
> >> Cc: Paul Walmsley<p...@pwsan.com>
> >> Cc: Rajendra Nayak<rna...@ti.com>
> >> ---
> >> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 111
> >> +++++++++++++---------------
> >> 1 files changed, 51 insertions(+), 60 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> >> b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> >> index e10d3f7..5c196a1 100644
> >> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> >> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> >
> > <snip>
> >> @@ -1456,7 +1455,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
> >> .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs),
> >> .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
> >> .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs),
> >> - .main_clk = "dss_fck",
> >> + .main_clk = "dss_sys_clk",
> >> .prcm = {
> >> .omap4 = {
> >> .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
> >
> > Hmm... I don't think this is right. By default the DSI uses dss_dss_clk
> > as the functional clock. sys_clk goes to the DSI PLL, and the output of
> > which can be later used as the fclk for DSI. But that requires setup.
>
> OK, it was not super clear from the DSS clock tree which one should be
> the main one.
> So you'd prefer to have the dss_dss_clk as main clock and keep the
> dss_sys_clk as a opt_clock?
Yes, I think that makes more sense.
My patch set had dss_dss_clk as the mainclock for all DSS blocks. You
have it a bit differently for venc, hdmi, rfbi. It's a bit difficult to
verify those, as the DSS and DISPC are anyway enabled before
venc/hdmi/rfbi, so the dss_dss_clk is anyway enabled. But they do make
sense by looking at the clock tree.
Tomi
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