[PATCH 1/2] pinctrl: sh-pfc: r8a7795: Add CAN support

[Ramesh Shanmugasundaram]

This patch adds CAN[0-1] pinmux support to r8a7795 SoC.

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasunda...@bp.renesas.com>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 58 ++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c 
b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
index ce4f5cd..fbe8e95 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7795.c
@@ -2913,6 +2913,43 @@ static const unsigned int scif_clk_b_mux[] = {
        SCIF_CLK_B_MARK,
 };
 
+/* - RCAN ------------------------------------------------------------------ */
+static const unsigned int can0_data_a_pins[] = {
+       /* TX, RX */
+       RCAR_GP_PIN(1, 23),     RCAR_GP_PIN(1, 24),
+};
+
+static const unsigned int can0_data_a_mux[] = {
+       CAN0_TX_A_MARK,         CAN0_RX_A_MARK,
+};
+
+static const unsigned int can0_data_b_pins[] = {
+       /* TX, RX */
+       RCAR_GP_PIN(2, 0),      RCAR_GP_PIN(2, 1),
+};
+
+static const unsigned int can0_data_b_mux[] = {
+       CAN0_TX_B_MARK,         CAN0_RX_B_MARK,
+};
+
+static const unsigned int can1_data_pins[] = {
+       /* TX, RX */
+       RCAR_GP_PIN(1, 22),     RCAR_GP_PIN(1, 26),
+};
+
+static const unsigned int can1_data_mux[] = {
+       CAN1_TX_MARK,           CAN1_RX_MARK,
+};
+/* - RCAN-CLK --------------------------------------------------------------- 
*/
+static const unsigned int can_clk_pins[] = {
+       /* CLK */
+       RCAR_GP_PIN(1, 25),
+};
+
+static const unsigned int can_clk_mux[] = {
+       CAN_CLK_MARK,
+};
+
 /* - SSI -------------------------------------------------------------------- 
*/
 static const unsigned int ssi0_data_pins[] = {
        /* SDATA */
@@ -3322,6 +3359,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(ssi9_data_b),
        SH_PFC_PIN_GROUP(ssi9_ctrl_a),
        SH_PFC_PIN_GROUP(ssi9_ctrl_b),
+       SH_PFC_PIN_GROUP(can0_data_a),
+       SH_PFC_PIN_GROUP(can0_data_b),
+       SH_PFC_PIN_GROUP(can1_data),
+       SH_PFC_PIN_GROUP(can_clk),
 };
 
 static const char * const audio_clk_groups[] = {
@@ -3636,6 +3677,20 @@ static const char * const ssi_groups[] = {
        "ssi9_ctrl_b",
 };
 
+static const char * const can0_groups[] = {
+       "can0_data_a",
+       "can0_data_b",
+};
+
+static const char * const can1_groups[] = {
+       "can1_data",
+};
+
+static const char * const can_clk_groups[] = {
+       "can_clk",
+};
+
+
 static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(audio_clk),
        SH_PFC_FUNCTION(avb),
@@ -3664,6 +3719,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(sdhi2),
        SH_PFC_FUNCTION(sdhi3),
        SH_PFC_FUNCTION(ssi),
+       SH_PFC_FUNCTION(can0),
+       SH_PFC_FUNCTION(can1),
+       SH_PFC_FUNCTION(can_clk),
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
-- 
1.9.1