On Wed, Jun 01, 2016 at 01:24:21AM +0300, Sergei Shtylyov wrote: > The initial R8A7792 SoC device tree including 2 CPU cores, GIC, timer, SYSC, > and the required clock descriptions. > > Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
This is rather large for an initial DTSI. Did you give any consideration to splitting it up: e.g. only providing what is needed to get to a serial console? With regards to SMP. Have you checked to make sure CPU hotplug works on all CPUs? And that the system behaves sanely on suspend/resume. If it is not possible to verify this at this stage then I would recommend only enabling one CPU at this stage.
