From: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Add the (previously omitted) SCIF2 pin data to the SK-RZG1E board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
arch/arm/boot/dts/r8a7745-sk-rzg1e.dts | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
b/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
index 97840b340197..0cd908796055 100644
--- a/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
+++ b/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
@@ -1,7 +1,7 @@
/*
* Device Tree Source for the SK-RZG1E board
*
- * Copyright (C) 2016 Cogent Embedded, Inc.
+ * Copyright (C) 2016-2017 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -34,7 +34,17 @@
clock-frequency = <20000000>;
};
+&pfc {
+ scif2_pins: scif2 {
+ groups = "scif2_data";
+ function = "scif2";
+ };
+};
+
&scif2 {
+ pinctrl-0 = <&scif2_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
--
2.1.4
