[PATCH 42/61] ARM: dts: r8a7745: add VIN dt support

[Simon Horman]

From: Fabrizio Castro <fabrizio.cas...@bp.renesas.com>

Add VIN[01] support to SoC dt. Also, add aliases.

Signed-off-by: Fabrizio Castro <fabrizio.cas...@bp.renesas.com>
Reviewed-by: Biju Das <biju....@bp.renesas.com>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
 arch/arm/boot/dts/r8a7745.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 52f13246fc8a..de13e156f071 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -31,6 +31,8 @@
                spi1 = &msiof0;
                spi2 = &msiof1;
                spi3 = &msiof2;
+               vin0 = &vin0;
+               vin1 = &vin1;
        };
 
        cpus {
@@ -821,6 +823,28 @@
                        status = "disabled";
                };
 
+               vin0: video@e6ef0000 {
+                       compatible = "renesas,vin-r8a7745",
+                                    "renesas,rcar-gen2-vin";
+                       reg = <0 0xe6ef0000 0 0x1000>;
+                       interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 811>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 811>;
+                       status = "disabled";
+               };
+
+               vin1: video@e6ef1000 {
+                       compatible = "renesas,vin-r8a7745",
+                                    "renesas,rcar-gen2-vin";
+                       reg = <0 0xe6ef1000 0 0x1000>;
+                       interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 810>;
+                       power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
+                       resets = <&cpg 810>;
+                       status = "disabled";
+               };
+
                du: display@feb00000 {
                        compatible = "renesas,du-r8a7745";
                        reg = <0 0xfeb00000 0 0x40000>;
-- 
2.11.0