From: Fabrizio Castro <fabrizio.cas...@bp.renesas.com>

This patch enables CAN0 interface exposed through connector J15 on the
carrier board.

Signed-off-by: Fabrizio Castro <fabrizio.cas...@bp.renesas.com>
Reviewed-by: Biju Das <biju....@bp.renesas.com>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
 arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts 
b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
index 80c82aa94c06..39ce7e7101c7 100644
--- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
+++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
@@ -59,6 +59,13 @@
        };
 };
 
+&can0 {
+       pinctrl-0 = <&can0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
 &hscif1 {
        pinctrl-0 = <&hscif1_pins>;
        pinctrl-names = "default";
@@ -85,6 +92,11 @@
                function = "avb";
        };
 
+       can0_pins: can0 {
+               groups = "can0_data";
+               function = "can0";
+       };
+
        hscif1_pins: hscif1 {
                groups = "hscif1_data", "hscif1_ctrl";
                function = "hscif1";
-- 
2.11.0

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