From: Yoshihiro Kaneko <ykaneko0...@gmail.com>
It is necessary to reset the LVDS Interface according to display on/off.
Therefore, this patch adds CPG reset properties in DU device node
for the R8A77995 SoC.
This patch was inspired by a patch in the BSP by Takeshi Kihara
<takeshi.kihara...@renesas.com>.
According to Laurent Pinchart, R-Car Gen3 reset is handled at the group
level so specifying one reset entry per group is sufficient. For
this reason <&cpg 724> is not listed as a reset for "du.1" as
was the case in an earlier revision of this patch.
Signed-off-by: Yoshihiro Kaneko <ykaneko0...@gmail.com>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
v2 [Simon Horman]
- only add one reset entry per group
v1 [Yoshihiro Kaneko]
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 0a344eb55094..ca6aeabd6d04 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -1001,6 +1001,8 @@
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
+ resets = <&cpg 724>;
+ reset-names = "du.0";
vsps = <&vspd0 0 &vspd1 0>;
status = "disabled";
--
2.11.0
