From: Takeshi Kihara <takeshi.kihara...@renesas.com> It is necessary to reset the LVDS Interface according to display on/off. Therefore, this patch adds CPG reset properties in DU device node for the R8A77990 SoC.
According to Laurent Pinchart, R-Car Gen3 reset is handled at the group level so specifying one reset entry per group is sufficient. For this reason <&cpg 724> is not listed as a reset for "du.1" as was the case in an earlier revision of this patch. Signed-off-by: Takeshi Kihara <takeshi.kihara...@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0...@gmail.com> Signed-off-by: Simon Horman <horms+rene...@verge.net.au> --- v2 [Simon Horman] - only add one reset entry per group v1 [Yoshihiro Kaneko] v0 [Takeshi Kihara] --- arch/arm64/boot/dts/renesas/r8a77990.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index b4318661f35e..84d1f58e73e7 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -1766,6 +1766,8 @@ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; + resets = <&cpg 724>; + reset-names = "du.0"; vsps = <&vspd0 0 &vspd1 0>; status = "disabled"; -- 2.11.0