[PATCH 5/5] clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate()

[Geert Uytterhoeven]

As the .round_rate() callback returns a long clock rate, it cannot
return clock rates that do not fit in signed long, but do fit in
unsigned long.  Hence switch the SD clocks on R-Car Gen3 from the old
.round_rate() callback to the newer .determine_rate() callback, which
does not suffer from this limitation.

This includes implementing range checking.

Absorb cpg_sd_clock_calc_div() into cpg_sd_clock_determine_rate(), and
replace the best divider by the best rate to avoid repeating one
division.

Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
---
 drivers/clk/renesas/rcar-gen3-cpg.c | 36 ++++++++++++++---------------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/drivers/clk/renesas/rcar-gen3-cpg.c 
b/drivers/clk/renesas/rcar-gen3-cpg.c
index 387b22f7d1755d02..9592e6e47ef330b5 100644
--- a/drivers/clk/renesas/rcar-gen3-cpg.c
+++ b/drivers/clk/renesas/rcar-gen3-cpg.c
@@ -315,33 +315,33 @@ static unsigned long cpg_sd_clock_recalc_rate(struct 
clk_hw *hw,
                                 clock->div_table[clock->cur_div_idx].div);
 }
 
-static unsigned int cpg_sd_clock_calc_div(struct sd_clock *clock,
-                                         unsigned long rate,
-                                         unsigned long parent_rate)
+static int cpg_sd_clock_determine_rate(struct clk_hw *hw,
+                                      struct clk_rate_request *req)
 {
-       unsigned long calc_rate, diff, diff_min = ULONG_MAX;
-       unsigned int i, best_div = 0;
+       unsigned long best_rate = ULONG_MAX, diff_min = ULONG_MAX;
+       unsigned long calc_rate, diff;
+       struct sd_clock *clock = to_sd_clock(hw);
+       unsigned int i;
 
        for (i = 0; i < clock->div_num; i++) {
-               calc_rate = DIV_ROUND_CLOSEST(parent_rate,
+               calc_rate = DIV_ROUND_CLOSEST(req->best_parent_rate,
                                              clock->div_table[i].div);
-               diff = calc_rate > rate ? calc_rate - rate : rate - calc_rate;
+               if (calc_rate < req->min_rate || calc_rate > req->max_rate)
+                       continue;
+
+               diff = calc_rate > req->rate ? calc_rate - req->rate
+                                            : req->rate - calc_rate;
                if (diff < diff_min) {
-                       best_div = clock->div_table[i].div;
+                       best_rate = calc_rate;
                        diff_min = diff;
                }
        }
 
-       return best_div;
-}
-
-static long cpg_sd_clock_round_rate(struct clk_hw *hw, unsigned long rate,
-                                     unsigned long *parent_rate)
-{
-       struct sd_clock *clock = to_sd_clock(hw);
-       unsigned int div = cpg_sd_clock_calc_div(clock, rate, *parent_rate);
+       if (best_rate == ULONG_MAX)
+               return -EINVAL;
 
-       return DIV_ROUND_CLOSEST(*parent_rate, div);
+       req->rate = best_rate;
+       return 0;
 }
 
 static int cpg_sd_clock_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -372,7 +372,7 @@ static const struct clk_ops cpg_sd_clock_ops = {
        .disable = cpg_sd_clock_disable,
        .is_enabled = cpg_sd_clock_is_enabled,
        .recalc_rate = cpg_sd_clock_recalc_rate,
-       .round_rate = cpg_sd_clock_round_rate,
+       .determine_rate = cpg_sd_clock_determine_rate,
        .set_rate = cpg_sd_clock_set_rate,
 };
 
-- 
2.17.1