Thomas Abraham wrote:
> Add watchdog timer clock instance for Exynos5 watchdog controller.
>
> Signed-off-by: Thomas Abraham<thomas.abra...@linaro.org>
> ---
> arch/arm/mach-exynos/clock-exynos5.c | 5 +++++
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/clock-exynos5.c
> b/arch/arm/mach-exynos/clock-exynos5.c
> index ad3bec4..662615d 100644
> --- a/arch/arm/mach-exynos/clock-exynos5.c
> +++ b/arch/arm/mach-exynos/clock-exynos5.c
> @@ -474,6 +474,11 @@ static struct clk exynos5_init_clocks_off[] = {
> .enable = exynos5_clk_ip_peris_ctrl,
> .ctrlbit = (1<< 20),
> }, {
> + .name = "watchdog",
> + .parent =&exynos5_clk_aclk_66.clk,
> + .enable = exynos5_clk_ip_peris_ctrl,
> + .ctrlbit = (1<< 19),
> + }, {
> .name = "hsmmc",
> .devname = "exynos4-sdhci.0",
> .parent =&exynos5_clk_aclk_200.clk,
Looks ok, will apply.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene....@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
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