On Wed, 26 Apr 2000, Maciej W. Rozycki wrote:
> On Sun, 23 Apr 2000, Arnaldo Carvalho de Melo wrote:
>
> > I was using 2.3.99-pre4-5 in a dual celeron ABIT BP6 mostly ok,
> > mostly because from time to time I get this:
> >
> > APIC error interrupt on CPU#1, should never happen.
> > ... APIC ESR0: 00000002
> > ... APIC ESR1: 00000002
> > ... bit 1: APIC Receive CS Error (hw problem).
> >
> > But aside from this the machine works ok, now with 2.3.99-pre6-5 the
> > second CPU is not enabled and I get only one CPU working :(
>
> Does it happen every time? Checksum errors indicate problems with the
> inter-APIC bus. Normal interrupts get resent until succeeded in case of
> such errors but INIT and StartUp inter-processor interrupts (IPIs) which
> are used for waking up of secondary CPUs do not. They are only sent once
> and if there is an error during the transmission they are simply ignored.
> So if one of these IPIs gets lost, the relevant secondary CPU does not
> boot.
>
> Note that the BP6 problems are beaten to death every now and then and I
> think I've seen some success reports after some BIOS upgrades, recently.
> I don't have such a board and I'm not particularly interested in Abit
> products but you might try to visit their web server and maybe search
> mailing list archives for a definite solution. If after a BIOS upgrade
I'll do this: get the latest BIOS and see if anything changes, but the
strange fact was that with the previous kernels it just worked. I'll post
it here I think today, at night, 10 hours from now, when I'll be back at
home.
- Arnaldo
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