Hi, After wens pointed me to: http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;h=9275ca21ac99592c7d520a41c0914b359c27b913;hb=refs/heads/lichee/jb-4.2.2-a31
I've tried to get a full SPL going on sun6i. No luck sofar, dropping in dram_sun6i.[c,h] +pll5 config seems to get the dram going, at least get_ram_size() likes it. But I cannot get the mmc to work in the SPL. I've narrowed this down to 2 problems, which I believe are related: 1) The mmc controller will simply not work with pll6 as source, after adding a test for the pll6 lock bit I believe this is caused by pll6 never locking. 2) When switching the mmc controller clocksource to OSC24M, then it does work, but gets stuck reading the first sector from the card. I believe this happens because the card is only being supplied 3.0V' rather then 3.3V. Note that the same code works fine in the no SPL u-boot when loaded through boot0 + boot1. Likely wrong power supply voltages are the culprit in both cases (the A31 also has a vdd-pll power pin. So it looks like the next step is to first get the pmic going in u-boot (which will be useful even if booted through boot0 + 1, to enable the nic-phy if nothing else). And then see from there. Maybe I'll take a shot at this tonight, for now I'm going to spend some time with my family. Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
