Hi,
On 09-01-15 09:51, Maxime Ripard wrote:
On Fri, Jan 09, 2015 at 09:36:28AM +0100, Hans de Goede wrote:
Hi,
On 09-01-15 09:30, Maxime Ripard wrote:
On Tue, Jan 06, 2015 at 12:56:37AM +0800, wens Tsai wrote:
<snip>
For sun6i it is somewhat harder.
Yep, that version D thing is going to cause us a bit of trouble, but
since we don't have any hardware available, I'd say we should ignore
it for now.
Version D ? I more or less completely missed that, care to explain ?
I guess this is going to impact u-boot too ?
I don't think it will, or at least, not for this issue.
From what we saw in the Allwinner BSPs, the A31 rev D might need
different operating points for cpufreq.
Ah, what about the max-speed operating point ? That is being set by
u-boot early on, specifically for sun6i / sun8i it sets VDD-CPU to 1.2V
and the CPU-clock to 1008MHz.
It's not really an issue
per-se, but supporting both pre-rev-D and post-rev-D will need to have
a bit of thoughts.
Hmm, tricky. What if we add a second, soc-specific, compatible to the
cpu nodes which contains the cpu-revision, and then have 2 nodes
for each cpu, with either one (or both) with status = "disabled"; and
then on early board init detect the revision and enable the right cpu
nodes ?
Regards,
Hans
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