Keep the PLL6 frequency as it is set by the bootloader, it may be used as
parent for the mbus, and if we change it we may be changing the mbus frequency,
all peripherals (*) using pll6 are already capable of dealing with it running at
a different frequency.
*) Only mmc uses pll6 as a parent by default
Signed-off-by: Hans de Goede <hdego...@redhat.com>
---
arch/arm/mach-sun5i/clock/clock.c | 9 +++------
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-sun5i/clock/clock.c
b/arch/arm/mach-sun5i/clock/clock.c
index 9ad13dd..94859bb 100644
--- a/arch/arm/mach-sun5i/clock/clock.c
+++ b/arch/arm/mach-sun5i/clock/clock.c
@@ -169,18 +169,15 @@ int clk_init(void)
tmpSclk->set_clk(tmpSclk->clk);
tmpSclk = &ccu_sys_clk[AW_SYS_CLK_PLL6];
- tmpSclk->clk->rate = 600000000;
- tmpSclk->set_clk(tmpSclk->clk);
+ tmpSclk->clk = aw_ccu_get_sys_clk(tmpSclk->clk->id);
tmpSclk->clk->onoff = AW_CCU_CLK_ON;
tmpSclk->set_clk(tmpSclk->clk);
tmpSclk = &ccu_sys_clk[AW_SYS_CLK_PLL6M];
- tmpSclk->clk->rate = 100000000;
- tmpSclk->set_clk(tmpSclk->clk);
+ tmpSclk->clk = aw_ccu_get_sys_clk(tmpSclk->clk->id);
tmpSclk->clk->onoff = AW_CCU_CLK_ON;
tmpSclk->set_clk(tmpSclk->clk);
tmpSclk = &ccu_sys_clk[AW_SYS_CLK_PLL62];
- tmpSclk->clk->rate = 300000000;
- tmpSclk->set_clk(tmpSclk->clk);
+ tmpSclk->clk = aw_ccu_get_sys_clk(tmpSclk->clk->id);
tmpSclk->clk->onoff = AW_CCU_CLK_ON;
tmpSclk->set_clk(tmpSclk->clk);
--
2.3.0
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