On Tue, Sep 26, 2017 at 06:59:17AM +0000, Chen-Yu Tsai wrote: > The HDMI controller found in the A31 SoCs is slightly different > from the one already supported, which is found in the A10s: > > - Need different initial values for the PLL related registers > > - Different behavior of the DDC and TMDS clocks > > - Different register layout for the DDC portion > > - Separate DDC parent clock > > This patch adds support for it. > > Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com> Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
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