> However, there seems to be no cache synchronisation. Similar point for > consistent mappings which are basically a combination of > __get_free_pages() and __pa() for x86 in arch/i386/kernel/pci-dma.c > > So my question was directed to what I've probably missed that ensures > cache synchronisation for DMA-mappings on x86. Hardware. The x86 PC class machine is hardware cache coherent all the way. They also have strict in order store ordering and other nice properties - all at a cost. The -ac kernel supports out of order store handling on the Winchip processors and its worth up to 20% performance increase. There you will find barriers in the pci_map code just like you'd expect (look at CONFIG_X86_OOSTORE in a current -ac if curious) _______________________________________________ [EMAIL PROTECTED] To unsubscribe, use the last form field at: http://lists.sourceforge.net/lists/listinfo/linux-usb-devel
