Oliver Neukum wrote:

That means that you can't tell. So you must assume the worst. The only safe usage with kmalloced memory is to have exactly one buffer per kmalloced area and to start the buffer at offset 0.

None of the host controller hardware has alignment restrictions for the start of DMA buffers. USB has _no_ such restrictions on DMA alignment.


The potential issue with using unaligned buffers is related to DMA-incoherent caches. If you have data laid out in memory like this:

    // cache line starts here
    u8 cpu_writes_here_1 [size1];
    u8 used_for_dma_read [dma_buflen];
    u8 cpu_writes_here_2 [size2];
    // cache line (maybe the Nth one) ends here

Then on certain kinds of system, there's no guarantee that
the CPU writes won't get lost ... cpu writes to either the
beginning or end of a cache line could get lost in certain
cases, if the cache isn't properly flushed or that cache line
is modified while the DMA is enabled.

Note that the issue comes up if "size1" is less than a cache
line (makes it resemble a DMA alignment issue) as well as
when "size2" is nonzero (doesn't look even vaguely like a
DMA alignment issue).

Systems without such potential issues include x86 systems
and most PPC ones.

- Dave



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