Bay Trail / BYT SoCs do not have a builtin device-mode phy, instead they require an external ULPI phy for device-mode.
Only some BYT devices have an external phy, but even on those devices device-mode is not working because the dwc3 does not see the phy. The problem is that the ACPI fwnode for the dwc3 does not contain the expected GPIO resources for the GPIOs connected to the chip-select and reset pins of the phy. I've found the workaround which some Android x86 kernels use for this: https://github.com/BORETS24/Kernel-for-Asus-Zenfone-2/blob/master/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c Which boils down to hardcoding the GPIOs for these devices. This commit adds a gpiod_lookup_table adding the mappings from Android, and installs this table on BYT system with their BIOS vendor DMI string set to "INSYDE Corp.". This seems to indicate that a (mostly) unmodified version of the reference design BIOS is used. 3 out of the 20 BYT tablets which I have for testing have an external ULPI phy and all 3 models use this vendor string. Signed-off-by: Hans de Goede <hdego...@redhat.com> --- drivers/usb/dwc3/dwc3-pci.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c index c961a94d136b..34b84d3bc7cf 100644 --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c @@ -8,6 +8,7 @@ * Sebastian Andrzej Siewior <bige...@linutronix.de> */ +#include <linux/dmi.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/slab.h> @@ -16,6 +17,7 @@ #include <linux/pm_runtime.h> #include <linux/platform_device.h> #include <linux/gpio/consumer.h> +#include <linux/gpio/machine.h> #include <linux/acpi.h> #include <linux/delay.h> @@ -54,6 +56,7 @@ struct dwc3_pci { guid_t guid; unsigned int has_dsm_for_pm:1; + unsigned int gpio_mapping_added:1; struct work_struct wakeup_work; }; @@ -66,6 +69,15 @@ static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = { { }, }; +static struct gpiod_lookup_table platform_bytcr_gpios = { + .dev_id = "0000:00:16.0", + .table = { + GPIO_LOOKUP("INT33FC:00", 54, "reset", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("INT33FC:02", 14, "cs", GPIO_ACTIVE_HIGH), + {} + }, +}; + static int dwc3_pci_quirks(struct dwc3_pci *dwc) { struct platform_device *dwc3 = dwc->dwc3; @@ -120,12 +132,24 @@ static int dwc3_pci_quirks(struct dwc3_pci *dwc) if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) { struct gpio_desc *gpio; + const char *vendor; ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_dwc3_byt_gpios); if (ret) dev_dbg(&pdev->dev, "failed to add mapping table\n"); + /* + * A lot of BYT devices lack ACPI resource entries for + * the GPIOs, add a manual mapping on devices which use + * an unmodified "INSYDE Corp." reference BIOS / design. + */ + vendor = dmi_get_system_info(DMI_BIOS_VENDOR); + if (vendor && strcmp(vendor, "INSYDE Corp.") == 0) { + gpiod_add_lookup_table(&platform_bytcr_gpios); + dwc->gpio_mapping_added = true; + } + /* * These GPIOs will turn on the USB2 PHY. Note that we have to * put the gpio descriptors again here because the phy driver @@ -256,6 +280,9 @@ static void dwc3_pci_remove(struct pci_dev *pci) { struct dwc3_pci *dwc = pci_get_drvdata(pci); + if (dwc->gpio_mapping_added) + gpiod_remove_lookup_table(&platform_bytcr_gpios); + #ifdef CONFIG_PM cancel_work_sync(&dwc->wakeup_work); #endif -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
