From: Quanyang Wang <quanyang.w...@windriver.com>
Add pinctrl assignment for flexcan3. And the pin CAN17_19_EN which
is wired out from TCA9539's pin[13], add a device-tree node
s32g_can17_19_en to enable CAN17~19 which correspond flexcan1~3.
Signed-off-by: Quanyang Wang <quanyang.w...@windriver.com>
Signed-off-by: Bruce Ashfield <bruce.ashfi...@gmail.com>
---
.../boot/dts/freescale/s32g274a-aptiv.dts | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dts
b/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dts
index a92f23353f11a..d711a07e25698 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dts
@@ -71,6 +71,12 @@ tca9539_74: tca9539@74 { // GPIO EXPANDER
#gpio-cells = <2>;
reg = <0x74>;
status = "okay";
+
+ reg_s32g_can17_19_en:s32g_can17_19_en {
+ gpio-hog;
+ gpios = <13 GPIO_ACTIVE_HIGH>;
+ output-high;
+ };
};
};
@@ -119,6 +125,12 @@ &can2 {
status = "okay";
};
+&can3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&can3_pins>;
+ status = "okay";
+};
+
&stm0 {
status = "okay";
};
@@ -226,6 +238,25 @@ can2_grp2 {
};
+ can3_pins: can3 {
+ can3_grp0 {
+ pinmux = <S32CC_PINMUX(29, FUNC1)>;
+ output-enable;
+ slew-rate = <S32CC_SLEW_150MHZ>;
+ };
+
+ can3_grp1 {
+ pinmux = <S32CC_PINMUX(30, FUNC0)>;
+ input-enable;
+ slew-rate = <S32CC_SLEW_208MHZ>;
+ };
+
+ can3_grp2 {
+ pinmux = <S32CC_PINMUX(633, FUNC3)>;
+ };
+
+ };
+
dspi1_pins: dspi1 {
dspi1_grp0 {
pinmux = <S32CC_PINMUX(7, FUNC2)>;
--
2.36.1
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