From: John Jacques <john.jacq...@lsi.com>

Signed-off-by: John Jacques <john.jacq...@lsi.com>
---
 arch/arm/boot/dts/axm55xxemu.dts | 200 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 200 insertions(+)
 create mode 100644 arch/arm/boot/dts/axm55xxemu.dts

diff --git a/arch/arm/boot/dts/axm55xxemu.dts b/arch/arm/boot/dts/axm55xxemu.dts
new file mode 100644
index 0000000..ae94ca4
--- /dev/null
+++ b/arch/arm/boot/dts/axm55xxemu.dts
@@ -0,0 +1,200 @@
+/*
+ * arch/arm/boot/dts/axm5500-sim.dts
+ *
+ * Copyright (C) 2012 LSI
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+/dts-v1/;
+
+/ {
+       model = "AXM5516";
+       compatible = "arm", "lsi,axm5516";
+       interrupt-parent = <&gic>;
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       chosen { };
+
+       aliases {
+               serial0   = &axxia_serial0;
+               timer     = &axxia_timers;
+               ethernet0 = &axxia_femac0;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <0>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <1>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+               };
+
+               cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <2>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+               };
+
+               cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <3>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+               };
+
+               /*
+               cpu@4 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <4>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+               };
+
+               cpu@5 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <5>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+               };
+
+               cpu@6 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <6>;
+                        cpu-release-addr = <0>; // Fixed by the boot loader
+               };
+               */
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               reg = <0 0x00000000 0 0x10000000>;
+       };
+
+       gic: interrupt-controller@2001001000 {
+               compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+               #interrupt-cells = <3>;
+               #address-cells = <0>;
+               interrupt-controller;
+               reg = <0x20 0x01001000 0 0x1000>,  /* gic dist base */
+                     <0x20 0x01002000 0 0x100>,   /* gic cpu base */
+                     <0x20 0x10030000 0 0x100>,   /* axm IPI mask reg base */
+                     <0x20 0x10040000 0 0x20000>; /* axm IPI send reg base */
+       };
+
+       timer {
+               compatible = "arm,armv7-timer";
+               interrupts = <1 13 0xf08>,
+                            <1 14 0xf08>;
+       };
+
+
+       gpdma@2020140000 {
+               compatible = "lsi,dma32";
+               reg = <0x20 0x20140000 0x00 0x1000>;
+               interrupts = <0 60 4>, /* busy */
+                            <0 61 4>; /* error */
+
+               channel0 {
+                       interrupts = <0 62 4>;
+               };
+
+               channel1 {
+                       interrupts = <0 63 4>;
+               };
+       };
+
+       gpdma@2020141000 {
+               status = "disabled";
+               compatible = "lsi,dma32";
+               reg = <0x20 0x20141000 0x00 0x1000>;
+               interrupts = <0 64 4>, /* busy */
+                            <0 65 4>; /* error */
+
+               channel0 {
+                       interrupts = <0 66 4>;
+               };
+
+               channel1 {
+                       interrupts = <0 67 4>;
+               };
+       };
+
+       gpreg@2010094000  {
+               compatible = "lsi,gpreg";
+               reg = <0x20 0x10094000 0 0x1000>;
+       };
+
+        axxia_femac0: femac@0x2010120000 {
+                compatible = "acp-femac";
+               device_type = "network";
+               reg = <0x20 0x10120000 0 0x1000>,
+                     <0x20 0x10121000 0 0x1000>,
+                     <0x20 0x10122000 0 0x1000>;
+               interrupts = <0 2 4>,
+                            <0 3 4>,
+                            <0 4 4>;
+               mdio-reg = <0x20 0x10090000 0 0x1000>;
+               mdio-clock = <0>;
+               phy-address = <0x3>;
+               ad-value = <0x61>;
+               mac-address = [00 00 00 00 00 00];
+       };
+
+        amba {
+               compatible = "arm,amba-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               axxia_serial0: uart@2010080000 {
+                       compatible = "arm,pl011", "arm,primecell";
+                       reg = <0x20 0x10080000 0x00 0x1000>;
+                       interrupts = <0 56 4>;
+               };
+
+               axxia_timers: timer@2010091000 {
+                       compatible = "arm,sp804", "arm,primecell";
+                       reg = <0x20 0x10091000 0 0x1000>;
+                       interrupts = <0 46 4>,
+                                    <0 47 4>,
+                                    <0 48 4>,
+                                    <0 49 4>,
+                                    <0 50 4>,
+                                    <0 51 4>,
+                                    <0 52 4>,
+                                    <0 53 4>;
+               };
+       };
+};
+
+/*
+  Local Variables:
+  mode: C
+  End:
+*/
-- 
1.8.3.4

_______________________________________________
linux-yocto mailing list
linux-yocto@yoctoproject.org
https://lists.yoctoproject.org/listinfo/linux-yocto

Reply via email to