From: Abhishek Paliwal <abhishek.pali...@aricent.com>
From: David Daney <dda...@caviumnetworks.com>
These instructions are available in OCTEON II CPUs.
Signed-off-by: David Daney <dda...@caviumnetworks.com>
Signed-off-by: Leonid Rosenboim <lrosenb...@caviumnetworks.com>
Signed-off-by: Abhishek Paliwal <abhishek.pali...@aricent.com>
---
arch/mips/include/asm/uasm.h | 2 ++
arch/mips/include/uapi/asm/inst.h | 7 +++++++
arch/mips/mm/uasm-mips.c | 2 ++
arch/mips/mm/uasm.c | 4 +++-
4 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index c33a956..0a0e300 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -145,6 +145,8 @@ Ip_0(_tlbwr);
Ip_u3u1u2(_xor);
Ip_u2u1u3(_xori);
+Ip_u1(_zcb);
+Ip_u1(_zcbt);
/* Handle labels. */
struct uasm_label {
diff --git a/arch/mips/include/uapi/asm/inst.h
b/arch/mips/include/uapi/asm/inst.h
index f25181b..8c16288 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -62,6 +62,7 @@ enum spec_op {
enum spec2_op {
madd_op, maddu_op, mul_op, spec2_3_unused_op,
msub_op, msubu_op, /* more unused ops */
+ cvm_op = 0x1f,
clz_op = 0x20, clo_op,
dclz_op = 0x24, dclo_op,
sdbpp_op = 0x3f
@@ -180,6 +181,12 @@ enum mad_func {
madd_fp_op = 0x08, msub_fp_op = 0x0a,
nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e
};
+/*
+ * func field for special2 cavium opcodes.
+ */
+enum cvm_func {
+ zcb_op = 0x1c, zcbt_op = 0x1d
+};
/*
* func field for special3 lx opcodes (Cavium Octeon).
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 3abd609..229ac23 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -113,6 +113,8 @@ static struct insn insn_table[] = {
{ insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 },
{ insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
{ insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD },
+ { insn_zcb, M(spec2_op, 0, 0, 0, zcb_op, cvm_op), RS },
+ { insn_zcbt, M(spec2_op, 0, 0, 0, zcbt_op, cvm_op), RS },
{ insn_invalid, 0, 0 }
};
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index b9d14b6..63dd1cc 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -54,7 +54,7 @@ enum opcode {
insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd,
insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw,
insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor,
- insn_xori,
+ insn_xori, insn_zcb, insn_zcbt
};
struct insn {
@@ -283,6 +283,8 @@ I_u1u2s3(_bbit0);
I_u1u2s3(_bbit1);
I_u3u1u2(_lwx)
I_u3u1u2(_ldx)
+I_u1(_zcb);
+I_u1(_zcbt);
#ifdef CONFIG_CPU_CAVIUM_OCTEON
#include <asm/octeon/octeon.h>
--
1.8.1.4
--
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