Hello cory this will not help much, most traces are in the inner layers. I suppose it's a 6 layer buildup...
but i have a 3G board, with some IC's removed, i can eventually try to remove everything, and scan it... sto Cory Walker a écrit : > THis is good news! Also great that Dan Andrews can donate a 2G to you. > Would it be possible to scan the 2G board without the processor? I don't > know if there are any exposed traces, but It would still be nice to have > a picture to look at. If we could get a hold of a 3G, I think it would > be a good idea to scan the traces under it's processor. I know the RAM > bus is exposed on that one (just look at the pictures). We could see > which pins control the RAM. > > On Sun, 2009-05-31 at 22:49 +0900, tof wrote: >> Hello everybody >> >> >> >> some fresh news from the pinout !! >> >> with some patience i identified a good number of the pins. >> http://f4eru.free.fr/8701/ >> >> if we can finish this task, the (brute force) finding of the JTAG could >> be very close !! >> >> seems there are around 30 new pins, due to the muxing of the NOR flash >> and the RAM. >> >> This muxing is cool for us, coz we can emulate the flash + sdram with >> less connections to the emulating fpga.... >> >> >> a lot of pin patterns correspond exactly to the 8700 order! >> >> I also wonder of the 1.5V instead of 1.2V, and the "PWR C"(as i called >> it, because i don't have the value) >> >> Also, the main XTAL is an active oscillator, strange for me, this >> probably costs more than a naked crystal.... >> >> >> also, as some pads are wiped off, on my board, it would be very very >> helpfull to get another broken IN2G >> >> >> >> Sto >> >> >> >> tof a écrit : >>> Hello everybody. >>> >>> >>> I did not have a lot of time in the last months, but now i'm back and >>> alive ;) >>> >>> I made very interesting investigations onthe 8701. >>> >>> first results : >>> >>> http://l4n.clustur.com/index.php/Main_Page/S5L8701_analysis >>> >>> http://f4eru.free.fr/8701%20pinout.ods >>> >>> >>> >>> The bad news : the pinout seems to be very different than the 8701, >>> there is a different clock system at least in the chip. >>> >>> Therefore it will be very hard to locate jtag pins, etc... >>> >>> What could be extrmely helpful would be to have decapsulated chips to >>> view under the microscope. >>> Does somebody here have an opportunity to acess decap. equipment? or at >>> least a contact where we could do this cheaply ? >>> >>> >>> More to come soon >>> >>> Sto >>> >>> >>> _______________________________________________ >>> Linux4nano-dev mailing list >>> [email protected] >>> https://mail.gna.org/listinfo/linux4nano-dev >>> http://www.linux4nano.org >>> >> _______________________________________________ >> Linux4nano-dev mailing list >> [email protected] >> https://mail.gna.org/listinfo/linux4nano-dev >> http://www.linux4nano.org > > > _______________________________________________ > Linux4nano-dev mailing list > [email protected] > https://mail.gna.org/listinfo/linux4nano-dev > http://www.linux4nano.org _______________________________________________ Linux4nano-dev mailing list [email protected] https://mail.gna.org/listinfo/linux4nano-dev http://www.linux4nano.org
