On Mon, Sep 03, 2007 at 01:43:27AM +0200, [EMAIL PROTECTED] wrote: > Quoting Peter Stuge <[EMAIL PROTECTED]>: > > > > Could you see if the SPI > > > > flash chip is connected to the Super IO? > > > > > > They are about 5 or 6 cm apart. > > > > It's not really possible to tell from visual inspection. Maybe > > with some measurements. > > Indeed it is!!! But NOT in the way this datasheet > (http://www.ite.com.tw/product_info/file/pc/IT8716F_V0.3.zip) > says! Here are the real connections I found on my board: > > super_io-pad55 -> spi_chip-pad5 (SI) > super_io-pad56 -> spi_chip-pad6 (SCK) > super_io-pad60 -> spi_chip-pad2 (SO)
Good news. Then we can make flashrom work. > super_io-pad61 -> spi_chip-pad1 (nCS) Is this a 0 ohm connection? > nHOLD (pad 7 of spi chip) and nWP (pad 3 of spi chip) are not > controlled at all by the super io chip! Correct. U5-HOLD# and U9-HOLD# are pulled high by R84. U5-WP# and U9-WP# are pulled high by R128. WP# can be pulled low using the BIOS_WP jumper, through R127 which I believe connects to R102-2. So, about the CS# signals then. If CS# is a direct connection I think U5-CS# and U9-CS# should be lifted from the board and pulled high independently, then a switch added which connects one chip's CS# pin back to the U5-CS# pad. > I have a little question : does someone have a more up-to-date > version of the DS of the it8716 chip? It seems to me that the > version that can be currently downloaded on the ite website doesn't > match at all the chip revision used on gigabyte mobo.. (regarding > the electrical interface at least..) I can't find any other documentation than that either. The M57SLI board with SOIC flash has a version C 8716, I guess they've changed the pinout. --8<-- 0.3 data sheet cover page Please note that the IT8716F V0.3 is applicable to D version and future versions. -->8-- //Peter -- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
