try again.
On Nov 25, 2007 3:23 PM, Uwe Hermann <[EMAIL PROTECTED]> wrote:
> The fix should be easy though. You probably forgot to 'svn add' the
> Kconfig file mainboard/pcengines/Kconfig.
fixed.
> Add a full stop to the help text, please.
fixed.
> > +## Copyright (C) 2007 coresystems GmbH
> > +## (Written by Stefan Reinauer <[EMAIL PROTECTED]> for coresystems GmbH)
>
> Ron Minnich?
I added my name but this is really a copy of an existing Kconfig, so I
left Stefan in.
> For now I'd say just drop the entries here, the code checks via #ifdef
> if they're defined and does nothing if they're not...
I deleted those entries .
>
>
> > +int main(void)
> > +{
> > + u8 smb_devices[] = {
> > + DIMM0, DIMM1
> > + };
> > +
> > + post_code(POST_START_OF_MAIN);
>
> POST_START_OF_MAIN, and...
>
>
> > +void hardware_stage1(void)
> > +{
> > + post_code(POST_START_OF_MAIN);
>
> ... POST_START_OF_MAIN again.
>
> Shouldn't those be different?
It's in every board. We have a problem here. Any ideas welcome, but I
would rather not hold up this commit since it just follows the pattern
of other boards; we need to fix them all.
>
>
> > +/{
> > + enabled;
> > + mainboard-vendor = "PC Engines";
> > + mainboard-name = "Alix 1C";
>
> ALIX1.C
fixed.
>
>
> > Index: mainboard/pcengines/alix1c/cmos.layout
> > ===================================================================
> > --- mainboard/pcengines/alix1c/cmos.layout (revision 0)
> > +++ mainboard/pcengines/alix1c/cmos.layout (revision 0)
>
> Add the common license header to this file, please.
no other cmos.layout has it. Let's get a template and apply them all,
but I don't want to hold this specific board up when we need a general
fix.
> Please don't hardcode POST codes, add them aѕ #defines in post_code.h
> and document them (i.e. in which situation it is supposed to be used).
uh oh. There's only one entry in post_code.h :-)
we need to sync up the doc and post_code.h
how about we commit this and take 3 action items:
1. fix up post_code.h
2. Fix all cmos.layout files with license headers
3. fix all main.c and stage1.c to use diffferent post code entries.
ron
Alix 1.C support for v3. Builds.
Signed-off-by: Ronald G. Minnich <[EMAIL PROTECTED]>
Index: mainboard/Kconfig
===================================================================
--- mainboard/Kconfig (revision 518)
+++ mainboard/Kconfig (working copy)
@@ -47,12 +47,18 @@
help
Select this option for various system emulators, such as QEMU.
+config VENDOR_PCENGINES
+ bool "PC Engines"
+ help
+ Select this option for PC Engines systems.
+
endchoice
source "mainboard/adl/Kconfig"
source "mainboard/amd/Kconfig"
source "mainboard/artecgroup/Kconfig"
source "mainboard/emulation/Kconfig"
+source "mainboard/pcengines/Kconfig"
choice
prompt "ROM chip size"
Index: mainboard/pcengines/Kconfig
===================================================================
--- mainboard/pcengines/Kconfig (revision 0)
+++ mainboard/pcengines/Kconfig (revision 0)
@@ -0,0 +1,39 @@
+##
+## This file is part of the LinuxBIOS project.
+##
+## Copyright (C) 2007 coresystems GmbH
+## (Written by Stefan Reinauer <[EMAIL PROTECTED]> for coresystems GmbH)
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+choice
+ prompt "Mainboard model"
+ depends on VENDOR_PCENGINES
+
+config BOARD_PCENGINES_ALIX1C
+ bool "Alix 1C"
+ select ARCH_X86
+ select CPU_AMD_GEODELX
+ select OPTION_TABLE
+ select NORTHBRIDGE_AMD_GEODELX
+ select SOUTHBRIDGE_AMD_CS5536
+ help
+ PC Engines Alix 1C
+
+endchoice
+
+source "mainboard/pcengines/alix1c/Kconfig"
+
Index: mainboard/pcengines/alix1c/Kconfig
===================================================================
--- mainboard/pcengines/alix1c/Kconfig (revision 0)
+++ mainboard/pcengines/alix1c/Kconfig (revision 0)
@@ -0,0 +1,28 @@
+##
+## This file is part of the LinuxBIOS project.
+##
+## Copyright (C) 2007 coresystems GmbH
+## (Written by Stefan Reinauer <[EMAIL PROTECTED]> for coresystems GmbH)
+## Copyright (C) 2007 Ronald G. Minnich <[EMAIL PROTECTED]>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+config MAINBOARD_NAME
+ string
+ default pcengines/alix1c
+ depends BOARD_PCENGINES_ALIX1C
+ help
+ This is the default mainboard name.
Index: mainboard/pcengines/alix1c/initram.c
===================================================================
--- mainboard/pcengines/alix1c/initram.c (revision 0)
+++ mainboard/pcengines/alix1c/initram.c (revision 0)
@@ -0,0 +1,81 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#define _MAINOBJECT
+
+#include <types.h>
+#include <lib.h>
+#include <console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <string.h>
+#include <msr.h>
+#include <io.h>
+#include <amd_geodelx.h>
+#include <northbridge/amd/geodelx/raminit.h>
+
+#define MANUALCONF 0 /* Do automatic strapped PLL config */
+#define PLLMSRHI 0x00001490 /* manual settings for the PLL */
+#define PLLMSRLO 0x02000030
+#define DIMM0 ((u8) 0xA0)
+#define DIMM1 ((u8) 0xA2)
+
+
+/**
+ * Place holder in case we ever need it. Since this file is a
+ * template for other motherboards, we want this here and we want the
+ * call in the right place.
+ */
+
+static void mb_gpio_init(void)
+{
+ /* Early mainboard specific GPIO setup */
+}
+
+/**
+ * main for initram for the PC Engines Alix 1C. It might seem that you
+ * could somehow do these functions in, e.g., the cpu code, but the
+ * order of operations and what those operations are is VERY strongly
+ * mainboard dependent. It's best to leave it in the mainboard code.
+ */
+int main(void)
+{
+ u8 smb_devices[] = {
+ DIMM0, DIMM1
+ };
+
+ post_code(POST_START_OF_MAIN);
+
+ system_preinit();
+
+ mb_gpio_init();
+
+ pll_reset(MANUALCONF, PLLMSRHI, PLLMSRLO);
+
+ cpu_reg_init(0, DIMM0, DIMM1);
+
+ sdram_set_registers();
+ sdram_set_spd_registers(DIMM0, DIMM1);
+ sdram_enable(DIMM0, DIMM1);
+ /* Check low memory */
+ /*ram_check(0x00000000, 640*1024); */
+
+ return 0;
+}
Index: mainboard/pcengines/alix1c/stage1.c
===================================================================
--- mainboard/pcengines/alix1c/stage1.c (revision 0)
+++ mainboard/pcengines/alix1c/stage1.c (revision 0)
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <types.h>
+#include <lib.h>
+#include <console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <string.h>
+#include <msr.h>
+#include <io.h>
+#include <amd_geodelx.h>
+#include <southbridge/amd/cs5536/cs5536.h>
+
+void hardware_stage1(void)
+{
+ post_code(POST_START_OF_MAIN);
+ geodelx_msr_init();
+
+ cs5536_stage1();
+
+ /* NOTE: must do this AFTER the early_setup!
+ * it is counting on some early MSR setup
+ * for cs5536.
+ */
+ /* We do this early for debug.
+ * real setup should done in chipset init via config.lb
+ */
+ cs5536_setup_onchipuart();
+}
Index: mainboard/pcengines/alix1c/dts
===================================================================
--- mainboard/pcengines/alix1c/dts (revision 0)
+++ mainboard/pcengines/alix1c/dts (revision 0)
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Ronald G. Minnich <[EMAIL PROTECTED]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/{
+ enabled;
+ mainboard-vendor = "PC Engines";
+ mainboard-name = "ALIX1.C";
+ cpus {
+ enabled;
+ };
+ domain0 {
+ enabled;
+ pcidomain = "0";
+ device0,0 {
+ enabled;
+ pcipath = "1,0";
+ };
+ southbridge {
+ /config/("southbridge/amd/cs5536");
+ pcipath = "0xf,1";
+ enabled;
+ };
+ };
+};
Index: mainboard/pcengines/alix1c/cmos.layout
===================================================================
--- mainboard/pcengines/alix1c/cmos.layout (revision 0)
+++ mainboard/pcengines/alix1c/cmos.layout (revision 0)
@@ -0,0 +1,75 @@
+entries
+
+#start-bit length config config-ID name
+#0 8 r 0 seconds
+#8 8 r 0 alarm_seconds
+#16 8 r 0 minutes
+#24 8 r 0 alarm_minutes
+#32 8 r 0 hours
+#40 8 r 0 alarm_hours
+#48 8 r 0 day_of_week
+#56 8 r 0 day_of_month
+#64 8 r 0 month
+#72 8 r 0 year
+#80 4 r 0 rate_select
+#84 3 r 0 REF_Clock
+#87 1 r 0 UIP
+#88 1 r 0 auto_switch_DST
+#89 1 r 0 24_hour_mode
+#90 1 r 0 binary_values_enable
+#91 1 r 0 square-wave_out_enable
+#92 1 r 0 update_finished_enable
+#93 1 r 0 alarm_interrupt_enable
+#94 1 r 0 periodic_interrupt_enable
+#95 1 r 0 disable_clock_updates
+#96 288 r 0 temporary_filler
+0 384 r 0 reserved_memory
+384 1 e 4 boot_option
+385 1 e 4 last_boot
+386 1 e 1 ECC_memory
+388 4 r 0 reboot_bits
+392 3 e 5 baud_rate
+400 1 e 1 power_on_after_fail
+412 4 e 6 debug_level
+416 4 e 7 boot_first
+420 4 e 7 boot_second
+424 4 e 7 boot_third
+428 4 h 0 boot_index
+432 8 h 0 boot_countdown
+440 1 e 0 dcon_present
+1008 16 h 0 check_sum
+
+enumerations
+
+#ID value text
+1 0 Disable
+1 1 Enable
+2 0 Enable
+2 1 Disable
+4 0 Fallback
+4 1 Normal
+5 0 115200
+5 1 57600
+5 2 38400
+5 3 19200
+5 4 9600
+5 5 4800
+5 6 2400
+5 7 1200
+6 6 Notice
+6 7 Info
+6 8 Debug
+6 9 Spew
+7 0 Network
+7 1 HDD
+7 2 Floppy
+7 8 Fallback_Network
+7 9 Fallback_HDD
+7 10 Fallback_Floppy
+#7 3 ROM
+
+checksums
+
+checksum 392 1007 1008
+
+
Index: mainboard/pcengines/alix1c/Makefile
===================================================================
--- mainboard/pcengines/alix1c/Makefile (revision 0)
+++ mainboard/pcengines/alix1c/Makefile (revision 0)
@@ -0,0 +1,45 @@
+##
+## This file is part of the LinuxBIOS project.
+##
+## Copyright (C) 2006-2007 coresystems GmbH
+## (Written by Stefan Reinauer <[EMAIL PROTECTED]> for coresystems GmbH)
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o
+
+INITRAM_OBJ = $(obj)/mainboard/$(MAINBOARDDIR)/initram.o \
+ $(obj)/northbridge/amd/geodelx/raminit.o \
+ $(obj)/southbridge/amd/cs5536/smbus_initram.o \
+ $(obj)/arch/x86/geodelx/geodelx.o
+
+STAGE2_MAINBOARD_OBJ =
+
+$(obj)/linuxbios.vpd:
+ $(Q)printf " BUILD DUMMY VPD\n"
+ $(Q)dd if=/dev/zero of=$(obj)/linuxbios.vpd bs=256 count=1 $(SILENT)
+
+$(obj)/linuxbios.initram $(obj)/linuxbios.initram.map: $(obj)/stage0.init $(obj)/stage0-prefixed.o $(patsubst %.o,%_xip.o,$(INITRAM_OBJ))
+ $(Q)# initram links against stage0
+ $(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(LD) --entry main -N -R $(obj)/stage0-prefixed.o \
+ $(patsubst %.o,%_xip.o,$(INITRAM_OBJ)) -o $(obj)/linuxbios.initram.o
+ $(Q)printf " OBJCOPY $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(OBJCOPY) -O binary $(obj)/linuxbios.initram.o \
+ $(obj)/linuxbios.initram
+ $(Q)printf " NM $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(NM) $(obj)/linuxbios.initram.o | sort -u > $(obj)/linuxbios.initram.map
+
--
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