On Monday 17 December 2007, I wrote:
> Potential ACKers please verify 01:0a.0 is not assigned any APIC pin so far.
Could someone please confirm that in src/mainboard/gigabyte/m57sli/mptable.c
01:0a.0 has fallen between the cracks? Anyone can do that.
Hardware owners could even verify it works. V1.x boards should for sure, v2
boards might.
Thanks in advance.
Torsten
Add an interrupt entry for the onboard firewire controller,
Bus 1, device 10, function 0 only, routed to IO-APIC pin 18
(verified on an v1.0 board).
TODO: add some comments and readable indentation!
Signed-off-by: Torsten Duwe <[EMAIL PROTECTED]>
--- CVS/LinuxBIOSv2/src/mainboard/gigabyte/m57sli/mptable.c 2007-11-06 00:49:23.000000000 +0100
+++ tmp/LinuxBIOSv2/src/mainboard/gigabyte/m57sli/mptable.c 2007-12-17 15:40:01.000000000 +0100
@@ -137,7 +137,7 @@
for(i=0;i<4;i++) {
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], ((0x07+j)<<2)|i, apicid_mcp55, 0x10 + (3+i+j)%4);
}
-
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], ((0x0a)<<2)|0, apicid_mcp55, 0x12);
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
--
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