On 9 Feb, Matthias Weidle wrote:
> hi again!
>
> first of all: thanks for all your quick responses! :-)
>
> --On Wednesday, February 07, 2001 01:46:33 PM -0500 [EMAIL PROTECTED] wrote:
>
>>> i do have 2 128MB SDRAM sticks (one single sided and one double sided).
>>
>> I'm not sure how many variations you have to worry about, but the code
>> works with either 1 or 2, single sided 128M dimms. If you put only
>> your single sided dimm in and put it in the right socket, and if all
>> the other variables happen to be correct, it should work.
>
> well ... then some other variables might be in the wrong state.
> i've tried putting the single sided 128M sdram stick in all of the _4_
> sockets but none of them seems to work.
Your ram may have different timing or different number of rows vs. cols.
> i wonder if there is any quick way to get it going for only that very ram
> stick ... like booting up with the original bios and then read the values
> of all the config registers?
> is that possible? and if yes: do you have some tiny program handy wich
> would do that job? :)
I have attached the tool I wrote for getting my system running. The
following command will compile it:
gcc -O2 i440bx_reg.c -o i440bx_reg
The -O2 is required because of inline functions that just disappear
without any optimisation.
However, these registers are not the whole story. I wasn't able to get
my system running until we soldered wires to the pads of the DIMM and
hooked it up to a logic analyser because for some of this, it isn't
what the register is set to but what addresses where written to and in
what order with some timing constraints.
You'll want to dig up the 440bx docs from intel along with several
others.
Start by running this program on a running system. Run it as root.
Make any obvious changes and see if it works. If it doesn't you will
need to get your hands really dirty and you might be better off working
on the auto-config stuff.
> one other thing: i noticed that there are to different versions of that
> crt0.S ... one which i would get by running the config script and one
> sitting in the mainboard subdir. which one is better to get started with?
> at least the autogenerated code doesn't have the ramtest stuff included ...
> so after doing some first tests i switched over to the mainboard specific
> source file.
I am using the auto generated one. I'm not sure if the old one still
works with the re-organized source code. The old one is a good
reference for how to use the ramtest since the config tool doesn't
currently support ramtest.
Good luck! ;-)
Ty
--
Tyson D Sawyer iRobot Corporation
Senior Systems Engineer Real World Interface Div.
[EMAIL PROTECTED] Robots for the Real World
603-532-6900 ext 206 http://www.irobot.com
#include <unistd.h>
#include <sys/io.h>
// #include <asm/io.h>
#include <errno.h>
#include <string.h>
#if 0 /* We don't really need or want this right now */
void cs_write(unsigned long port, unsigned char val) {
outl(port & 0xfffffffc | 0x80000000, 0x0cf8);
outb(val, 0xcfc + (port & 0x3));
}
#endif
unsigned char cs_read_b(unsigned long port) {
outl(port & 0xfffffffc | 0x80000000, 0x0cf8);
return(inb(0xcfc + (port & 0x3)));
}
unsigned short cs_read_w(unsigned long port) {
outl(port & 0xfffffffc | 0x80000000, 0x0cf8);
return(inw(0xcfc + (port & 0x3)));
}
unsigned long cs_read_l(unsigned long port) {
outl(port & 0xfffffffc | 0x80000000, 0x0cf8);
return(inl(0xcfc + (port & 0x3)));
}
void cs_show_b(unsigned long port, char *desc) {
printf("0x%04x: 0x%02x : %s\n", port, cs_read_b(port), desc);
}
void cs_show_w(unsigned long port, char *desc) {
printf("0x%04x: 0x%04x : %s\n", port, cs_read_w(port), desc);
}
void cs_show_l(unsigned long port, char *desc) {
printf("0x%04x: 0x%08x : %s\n", port, cs_read_l(port), desc);
}
int main(int argc, char *argv[]) {
int rv;
rv = iopl(3);
if (rv<0) {
printf("iopl() - %d:%d:%s\n", rv, errno, strerror(errno));
exit(-1);
}
cs_show_w(0x00, "VID");
cs_show_w(0x02, "DID");
cs_show_b(0x08, "RID");
cs_show_b(0x0a, "SUBC");
cs_show_b(0x0b, "BCC");
cs_show_b(0x0d, "MLT");
cs_show_w(0x2c, "SVID");
cs_show_w(0x2e, "SID");
printf("\n");
cs_show_l(0x50, "NBXCFG");
printf("\n");
cs_show_b(0x57, "DRAMC");
cs_show_b(0x58, "DRAMT");
printf("\n");
cs_show_b(0x59, "PAM[0]");
cs_show_b(0x5a, "PAM[1]");
cs_show_b(0x5b, "PAM[2]");
cs_show_b(0x5c, "PAM[3]");
cs_show_b(0x5d, "PAM[4]");
cs_show_b(0x5e, "PAM[5]");
cs_show_b(0x5f, "PAM[6]");
printf("\n");
/* bank size registers */
cs_show_b(0x60, "DRB[0]");
cs_show_b(0x61, "DRB[1]");
cs_show_b(0x62, "DRB[2]");
cs_show_b(0x63, "DRB[3]");
cs_show_b(0x64, "DRB[4]");
cs_show_b(0x65, "DRB[5]");
cs_show_b(0x66, "DRB[6]");
cs_show_b(0x67, "DRB[7]");
printf("\n");
/* Fixed DRAM hole control register */
cs_show_b(0x68, "FDHC");
printf("\n");
/* Memory Buffer Strength Control Register */
cs_show_b(0x69, "MBSC[0]");
cs_show_b(0x6a, "MBSC[1]");
cs_show_b(0x6b, "MBSC[2]");
cs_show_b(0x6c, "MBSC[3]");
cs_show_b(0x6d, "MBSC[4]");
cs_show_b(0x6e, "MBSC[5]");
printf("\n");
cs_show_b(0x72, "SMRAM");
cs_show_b(0x73, "ESMRAMC");
/* SDRAM Row Page Size Register */
cs_show_w(0x74, "RPS");
/* SDRAM Control Register */
cs_show_w(0x76, "SDRAMC");
/* Paging Policy Register */
cs_show_w(0x78, "PGPOL");
printf("\n");
/* Memory Buffer Frequency Select Register */
cs_show_b(0xca, "MBFS[0]");
cs_show_b(0xcb, "MBFS[1]");
cs_show_b(0xcc, "MBFS[2]");
exit(0);
}
