Ronald G Minnich <[EMAIL PROTECTED]> writes:
> can you send a sample of the table?
O.k. here is a snapshot of my code. I really won't be confortable
until I use it and have verified it 100% and I can regenerate
an mptable, and an irq routing table from it. And the results
are the same, or if they are different I know why they are different.
There are some interesting scribles at the top of the file but
the current stuff is down at the bottom.
The technique I am using is to build subroutines that build the tree.
If this needs to happern during build time (instead of runtime) I will
build a program that outputs a static table.
if 1
typedef unsigned int uint32_t;
#endif
#if 0
/* For now all data is little endian.
*/
typedef uint32_t offset_t;
typedef offset_t string_offset; /* offset of a struct table_string */
typedef offset_t link_offset; /* offset of a struct table_link */
typedef offset_t device_offset; /* offset of a struct table_device */
struct table_string
{
offset_t length; /* in bytes */
unsigned char bytes[0]; /* The data bytes immediately follow. */
} __attribute__((packed));
struct table_device_id
{
string_offset id_type;
string_offset manufacturer;
string_offset device;
} __attribute__((packed));
struct table_link
{
string_offset label;
string_offset link_addresses;
/* add connected devices? */
} __attribute__((packed));
struct table_resource
{
string_offset label;
string_offset start;
string_offset size;
link_offset link;
} __attribute__((packed));
struct table_device
{
string_offset label;
struct table_device_id device_id;
device_offset containter_device;
offset_t resource_count;
struct resource_table resource[0];
} __attribute__((packed));
#endif
struct device_id
{
char * id_type;
char * manufacturer;
char * device;
};
struct link
{
char * label;
struct link *container_link;
uint64_t max_link_address;
struct link *next_link; /* internal use only */
};
struct resource
{
char *label;
struct resource *predicate;
uint64_t first_addr;
uint64_t last_addr;
int flags;
#define RES_SLAVE 0
#define RES_MASTER 1
struct link * link;
struct resource *next_resource; /* internal use only */
};
struct device
{
char *label;
struct device_id device_id;
struct device *container_device;
struct device *next_device /* internal use only */
#if 0
offset_t resource_count;
struct resource resource[0];
#endif
struct resource *resources;
}
#if 0
struct devices
{
struct string pci_irqa;
char pci_irqa_str[5];
struct string pci_irqb;
char pci_irqb_str[5];
struct string pci_irqc;
char pci_irqc_str[5];
struct string pci_irqd;
char pci_irqd_str[5];
struct string pci_resource_0;
char pci_resource_0_str[5];
struct string pci_resource_1;
char pci_resource_1_str[5];
struct string pci_resource_2;
char pci_resource_2_str[5];
struct string pci_resource_3;
char pci_resource_3_str[5];
struct string pci_resource_4;
char pci_resource_4_str[5];
struct string pci_resource_5;
char pci_resource_5_str[5];
struct string pci_conf_space;
char pci_conf_space_str[5];
struct string pci_device_type;
char pci_devie_type_str[3];
struct string pci_vendor_id_amd;
char pci_vendor_id_amd_str[2];
struct string pci_device_id_amd;
char pci_device_id_amd_fe_gate_700C[2];
struct string label_host_bridge;
char label_host_brige_str[11];
struct device host_bridge;
struct resource host_bridge_resources[1];
} = {
{ 5, }, "pirqa",
{ 5, }, "pirqb",
{ 5, }, "pirqc",
{ 5, }, "pirqd",
{ 5, }, "pres0",
{ 5, }, "pres1",
{ 5, }, "pres2",
{ 5, }, "pres3",
{ 5, }, "pres4",
{ 5, }, "pres5",
{ 5, }, "pconf",
{ 3, }, "PCI",
{ 2, }, "\x22\x10",
{ 2, }, "\x0C\x70",
{ 11, }, "Host bridge";
{
offsetof(struct devices, label_host_bridge),
{
offsetof(struct devices, pci_device_type),
offsetof(struct devices, pci_vendor_id_amd),
offsetof(struct devices, pci_device_id_amd_fe_gate_700c),
}
offsetof(struct devices, host_bridge),
1,
},
{
{
},
},
} devices;
#endif
struct devices {
struct link cpu0_link;
struct link cpu1_link;
struct link memory_bus;
struct link pci_conf0;
struct link pci_mem0;
struct link pci_io0;
struct link pci_spec0;
struct link agp_bus;
struct link irq_link;
struct link apic_bus;
struct link pirqa;
struct link pirqb;
struct link pirqc;
struct link pirqd;
struct device amd_762;
struct resource amd_762_resources[5];
struct device cpu_memory_pci_bridge;
struct device pci_agp_bridge;
struct device amd_766;
struct resource amd_766_resources[7];
struct device cpu0_socket;
struct device cpu1_socket;
} = {
{ "cpu0_link", 2, },
{ "cpu1_link", 2, },
{ "memory_bus", 4, },
{ "pci_conf0", 65536, },
{ "pci_mem0", 4294967295, },
{ "pci_io0", 65536, },
{ "pci_spec0", 1, },
{ "agp_bus", 1, },
{ "irq_link", 1, },
{ "apic_bus", 256, },
{ "pirqa", 1, },
{ "pirqb", 1, },
{ "pirqc", 1, },
{ "pirqd", 1, },
{
"AMD-762",
{
"Part Number",
"AMD",
"762",
},
&devices.amd_762,
5,
}
{
{ "cpu0_link_slave", 0, 1, RES_SLAVE,
&devices.cpu0_link },
{ "cpu0_link_master", 1, 1, RES_MASTER,
&devices.cpu0_link },
{ "cpu1_link_slave", 0, 1, RES_SLAVE,
&devices.cpu1_link },
{ "cpu1_link_master", 1, 1, RES_MASTER,
&devices.cpu1_link },
{ "memory_bus", 0, 4, RES_MASTER, &devices.memory_bus },
{ "pci_bus0", 0, 31, RES_MASTER, &devices.pci_bus0 },
{ "agp_bus", 0, 1, RES_MASTER, &devices.agp_bus },
},
{
"CPUs <-> Memory <-> PCI Bridge",
{
"PCI",
"\x22\x10",
"\x0C\x70",
},
&devices.amd_762,
0,
},
{
"AGP <-> PCI Bridge",
{
"PCI",
"\x22\x10",
"\x0D\x70",
},
&devices.amd_762,
0,
},
{
"AMD-766",
{
"Part Number",
"AMD",
"766",
},
&devices.amd_766,
7,
},
{
{ "pci_conf0", 7<<11, 1<<11, RES_SLAVE,
&devices.pci_bus0 },
{ "pci_mem0", 7, 1, RES_SLAVE,
&devices.pci_bus0 },
{ "pci_io0", 7, 1, RES_SLAVE,
&devices.pci_bus0 },
{ "pci_spec0", 0, 1, RES_SLAVE,
&devices.pci_bus0 },
{ "irq_link", 0, 1, RES_SLAVE,
&devices.irq_link },
{ "apic_bus", 2, 1, RES_SLAVE,
&devices.apic_link },
{ "pirqa", 0, 1, RES_SLAVE, &devices.pirqa
},
{ "pirqb", 0, 1, RES_SLAVE, &devices.pirqb
},
{ "pirqc", 0, 1, RES_SLAVE, &devices.pirqc
},
{ "pirqd", 0, 1, RES_SLAVE, &devices.pirqd
},
},
} devices;
struct device *device_list = 0;
struct link *link_list = 0;
struct device *__add_device(char *label, struct device *parent, struct device_id id)
{
struct device *device;
device = malloc(sizeof(*device));
device->label = label;
device->device_id = id;
device->containter_device = parent;
device->next_resource = device_list;
device->resources = 0;
device_list = device;
return device;
}
struct link *__add_link(char *label, struct link *parent, uint64_t max_address)
{
struct link *link;
link = malloc(sizeof(*link));
link->label = label;
link->container_link = parent;
link->max_link_address = max_addresses;
link->next_link = link_list;
link_list = link;
return link;
}
struct resource *__add_resource(char *label, struct link *link, struct device *dev
struct resource *predicate, uint64_t first_addr, uint64_t last_addr, int flags)
{
struct resource *resource;
resource = malloc(sizeof *resource);
resource->label = label;
resource->predicate = predicate;
resource->first_addr = first_addr;
resource->last_addr = last_addr;
resource->flags = flags;
resource->link = link;
resource->next_resource = dev->resources;
dev->resources = resource;
return resource;
}
struct device *add_device(char *label, struct device_id id)
{
return __add_device(label, 0, id);
}
struct device *add_sub_device(char *label, struct device *parent, struct device_id id)
{
return __add_device(label, parent, id);
}
struct link *add_link(char *label, uint64_t max_address)
{
return __add_link(label, 0, max_address);
}
struct link *add_sub_link(char *label, struct link *parent, uint64_t max_address)
{
return __add_link(label, parent, max_address);
}
struct resource *slave_link(char *label, struct link *link, struct device *dev,
uint64_t first_addr, uint64_t last_addr)
{
return __add_resource(label, link, dev, 0, first_addr, last_addr, RES_SLAVE);
}
struct resource *slave_sub_link(char *label, struct link *link, struct device *dev,
struct reource *predicate, uint64_t first_addr, uint64_t last_addr)
{
return __add_resource(label, link, dev, predicate, first_addr, last_addr,
RES_SLAVE);
}
struct resource *master_link(char *label, struct link *link, struct device *dev,
uint64_t first_addr, uint64_t last_addr)
{
return __add_resource(label, link, dev, 0, first_addr, last_addr, RES_MASTER);
}
struct resource *master_sub_link(char *label, struct link *link, struct device *dev,
struct resource *predicate, uint64_t first_addr, uint64_t last_addr)
{
return __add_resource(label, link, dev, predicate, first_addr, last_addr,
RES_MASTER);
}
void master_entire_link(char *label, struct link *link, struct device *dev,
uint64_t start, uint64_t size)
{
__add_resource(label, link, dev, 0, 0, link->max_address, RES_MASTER);
}
void connect_link(char *label, struct link *link, struct device *dev,
uint64_t start, uint64_t size)
{
static const char slave_prefix[] = "slave:";
static const char slave_prefix[] = "master:";
char *slave_label, *master_label;
slave_label = malloc(strlen(slave_prefix) + strlen(label) + 1);
master_label = malloc(strlen(master_prefix) + strlen(label) + 1);
__add_resource(slave_label, link, dev, start, size, RES_SLAVE);
__add_resource(master_label, link, dev, 0, link->max_address, RES_MASTER);
}
struct device_id pci_id(unsigned vendor_id, unsigned device)
{
struct device_id result;
char *ptr;
ptr = malloc(4);
result.id_type = "PCI";
result.manufacturer = ptr;
result.device = ptr +2;
result.manufacturer[0] = vendor_id & 0xff;
result.manufacturer[1] = (vendor_id >> 8) & 0xff;
result.device[0] = device & 0xff;
result.device[1] = (device >> 8) & 0xff;
return result;
}
struct device_id part_number(char *manufacturer, char *part_number)
{
struct device_id result;
result.id_type = "PART NUMBER";
result.manufacturer = manufacturer;
result.device = part_number;
return result;
}
struct device_id part_number_function(char *manufacturer, char *part_number, char
*function)
{
struct device_id result;
result.id_type = "PART NUMBER FUNCTION";
result.manufacturer = manufacturer;
result.device = malloc(strlen(part_number) + strlen(function) +2);
sprintf(result.device, "%s:%s", part_number, function);
return result;
}
struct irq_bus {
/*
* trigger 0 == Edge Triggered
* trigger 1 == Level Triggered
* polarity 0 == polarity low
* polarity 1 == polarity high
*/
#define TRIGGER_EDGE 0
#define TRIGGER_LEVEL 1
#define POLARITY_LOW 0
#define POLARITY_HIGH 1
struct link *irq;
struct link *trigger;
struct link *polarity;
};
struct irq_bus *add_irq_bus(char *label, uint64_t max_address)
{
static const char trigger[] = " trigger";
static const char polarity[] = " polarity";
struct irq_bus *result;
result = malloc(*result);
result->irq = add_link(label, max_address);
result->trigger = malloc(strlen(label) + strlen(trigger) +1);
sprintf(resutl->trigger, "%s%s", label, trigger);
result->polarity = malloc(strlen(label) + strlen(polarity) +1);
sprintf(resutl->trigger, "%s%s", label, polarity);
return result;
};
void __add_irq(char *label, struct irq_bus, *bus, struct device *dev,
uint64_t irq, int polarity, int trigger, int flags)
{
struct resource *res_irq, *res_polarity, *res_trigger;
res_irq = __add_resrouce(label, bus->irq, dev, 0,
irq, irq, flags);
res_polarity = __add_resource(label, bus->polarity, dev, res_irq,
!!polarity, !!polarity, flags);
res_trigger = __add_resource(label, bus->trigger, dev, res_polarity,
!!trigger, !!trigger, flags);
}
void add_master_irq(char *label, struct irq_bus *bus, struct device *dev,
uint64_t irq, int polarity, int trigger)
{
__add_irq(label, bus, dev, irq, polarity, trigger, RES_MASTER);
}
void add_slave_irq(char *label, struct irq_bus *bus, struct device *dev,
uint64_t irq, int polarity, int trigger)
{
__add_irq(label, bus, dev, irq, polarity, trigger, RES_SLAVE);
}
void add_routed_irq(char *label, struct irq_bus *bus_in, struct irq_bus *bus_out,
struct device *dev, uint64_t irq_in, uint64_t low_irq_out, uint64_t
high_irq_out)
{
struct resource *res_irq, *res_polarity, *res_trigger;
res_irq = __add_resource(label, bus_in->irq, dev, 0,
irq_in, irq_in, RES_SLAVE);
res_polarity = __add_resource(label, bus_in->polarity, dev, res_irq,
0, 1, RES_SLAVE);
res_trigger = __add_resource(label, bus_in->trigger, dev, res_polarity,
0, 1, RES_SLAVE);
res_irq = __add_resource(label, bus_out->irq, dev, 0,
low_irq_out, high_irq_out, RES_MASTER);
res_polarity = __add_resource(label, bus_out->polarity, dev, res_irq,
0, 1, RES_MASTER);
res_trigger = __add_resource(label, bus_out->trigger, dev, res_polarity,
0, 1, RES_MASTER);
}
void master_pci_irq(char *label, struct irq_bus *bus, struct device *dev, uint64_t irq)
{
add_master_irq(label, bus, dev, irq, POLARITY_LOW, TRIGGER_LEVEL);
}
void master_isa_irq(char *label, struct irq_bus *bus, struct device *dev, uint64_t irq)
{
add_master_irq(label, bus, dev, irq, POLARITY_HIGH, TRIGGER_EDGE);
}
struct pci_bus {
int bus_num;
struct link *bus;
struct link *conf;
struct link *mem;
struct link *io;
struct link *spec;
};
static struct pci_bus *add_pci_bus(int bus_num)
{
/* FIXME handle dual address cycle pci transactions */
/* FIXME do I need a special channel for pci special cycles */
static const char pci_bus[] = "PCI Bus ";
static const char config_space[] = "PCI Configuration Space ";
static const char mem_space[] = "PCI Memory Space ";
static const char io_space[] = "PCI IO Space ";
static const char special_cycle[] = "PCI Special Cycles ";
char *name;
struct pci_bus *bus;
char bus_number[20];
char *pci_bus_name, *config_space_name, *mem_space_name, *io_space_name,
*special_cycle_name;
sprintf(bus_number, "%d", bus_num);
pci_bus_name = malloc(strlen(pci_bus) + strlen(bus_number) +1);
config_space_name = malloc(strlen(config_space) + strlen(bus_number) +1);
mem_space_name = malloc(strlen(mem_space) + strlen(bus_number) +1);
io_space_name = malloc(strlen(io_space) + strlen(bus_number) +1);
special_cycle_name = malloc(strlen(special_cycle) + strlen(bus_number) +1);
sprintf(pci_bus_name, "%s%s", pci_bus, bus_number);
sprintf(config_space_name_name, "%s%s", config_space, bus_number);
sprintf(mem_space_name_name, "%s%s", mem_space, bus_number);
sprintf(io_space_name_name, "%s%s", io_space, bus_number);
sprintf(special_cycle_name, "%s%s", special_cycle, bus_number);
bus = malloc(sizeof(struct pci_bus));
bus->bus_num = bus_num;
bus->bus = add_link(pci_bus_name, 0);
bus->conf = add_sub_link(config_space_name, bus->bus, 65535);
bus->mem = add_sub_link(mem_space_name, bus->bus, 4294967295);
bus->io = add_sub_link(io_space_name, bus->bus, 65535);
bus->spec = add_sub_link(special_cycle_name, bus->bus, 0);
return bus;
}
static void __pcidev(struct pci_bus *bus, int start_conf_addr, int last_conf_addr,
struct irq_bus *irq_bus, int pina, int pinb, int pinc, int pind,
struct device *dev)
{
master_link("pci_bus", bus->bus, dev, 0, 0);
master_link("pci_conf_bus", bus->conf, dev, 0, 65535);
/* FIXME handle the dual address cycle case */
master_link("pci_mem_bus", bus->mem, dev, 0, 429467295);
master_link("pci_io_bus", bus->io, dev, 0, 65535);
slave_link("pci_special_cycles", bus->spec, 0, 0);
slave_link("pci_conf", bus->conf, dev, start_conf_addr, last_conf_addr);
if (pina >= 0) master_pci_irq("pci_pina", bus->irq_bus, dev, pina);
if (pinb >= 0) master_pci_irq("pci_pinb", bus->irq_bus, dev, pinb);
if (pinc >= 0) master_pci_irq("pci_pinc", bus->irq_bus, dev, pinc);
if (pind >= 0) master_pci_irq("pci_pind", bus->irq_bus, dev, pind);
}
static void pcidev(struct pci_bus *bus, int devfn,
struct irq_bus *irq_bus, int pina, int pinb, int pinc, int pind,
struct device *dev)
{
__pcidev(bus, devfn << 8, ((devfn + DEVFN(0,1))<< 8) -1,
irq_bus, pina, pinb, pinc, pind, dev);
}
static void pcislot(struct pci_bus *bus, int devfn,
struct irq_bus *irq_bus, int pina, int pinb, int pinc, int pind,
struct device *dev)
{
__pcidev(bus, devfn << 8, ((devfn + DEVFN(1,0))<< 8) -1,
irq_bus, pina, pinb, pinc, pind, dev);
}
void mainboard_register_hardware(void)
{
struct device *cpu0, *cpu1;
struct device *dimm0, *dimm1, *dimm2, *dimm3;
struct device *amd762, *hostbridge, *agpbridge;
struct device *amd766, *isa_bridge, *ide_bridge, *pm_bridge, *usb_bridge,
*i82559pic, *i8254timer, *dma, *speaker, *mc146818rtc, *ioapic,
*irq_router;
struct device *pci_slot0, *pci_slot1, *pci_slot2, *pci_slot3, *pci_slot4;
struct device *agp_slot0;
struct device *superio, *fd0, *lpt0, *ttyS0, *ttyS1, *kbc, *cir, *js0,
*gpio0, *gpio1, *acpi, *hwmon;
struct device *flash ;
struct device *eth0, *eth1, *rage_xl;
struct device *aic7899w, *scsi0, *scsi1;
struct link *cpu0_link, *cpu1_link, *memory_bus;
struct pci_bus *pci_bus0;
struct irq_bus *pirqs, isa_irq, apic_bus;
cpu0 = add_socket_a("CPU socket 0");
cpu1 = add_socket_a("CPU socket 1");
dimm0 = add_ddr_socket("DIMM 0");
dimm1 = add_ddr_socket("DIMM 1");
dimm2 = add_ddr_socket("DIMM 2");
dimm3 = add_ddr_socket("DIMM 3");
amd762 = add_device("AMD-762", part_number("AMD", "762"));
amd766 = add_device("AMD-766", part_number("AMD", "766"));
superio = add_device("Winbond W83627HF", part_number("Winbond", "W83627HF"));
#if 0
flash = add_device("SST 39SF020", part_number("SST", "39SF020"));
#else
flash = add_device("SST 39SF020", part_number("MX", "29F004TQC"));
#endif
pci_slot0 = add_pci_slot("SLOT 0");
pci_slot1 = add_pci_slot("SLOT 1");
pci_slot2 = add_pci_slot("SLOT 2");
pci_slot3 = add_pci_slot("SLOT 3");
pci_slot4 = add_pci_slot("SLOT 4");
agp_slot = add_agp_slot("AGP SLOT");
aic7899w = add_device("Adaptec Onboard SCSI", part_number("Adaptec", "7899w"));
eth0 = add_device("3COM 3c980", pci_id(0x10b7, 0x9800));
eth1 = add_device("3COM 3c980", pci_id(0x10b7, 0x9800));
rage_xl = add_device("ATI Rage XL", pci_id(0x1002, 0x4752));
/* AMD762 */
hostbridge = add_sub_device("CPUs <-> Memory <-> PCI Bridge",
amd762, pci_id(0x1022, 0x700c));
agpbridge = add_sub_device("AGP <-> PCI Bridge",
amd762, pci_id(0x1022, 0x700d));
/* AMD766 */
isa_bridge = add_sub_device("ISA Bridge",
amd766, pci_id(0x1022, 0x7410));
ide_bridge = add_sub_device("IDE Interface",
amd766, pci_id(0x1022, 0x7411));
pm_bridge = add_sub_device("Power Managment Interface",
amd766, pci_id(0x1022, 0x7413));
usb_bridge = add_sub_device("USB Controlller",
amd766, pci_id(0x1022, 0x7414));
i82559pic = add_sub_device("PIC",
amd766, pnp_id("PNP", 0x0000));
i8254timer = add_sub_device("Timer",
amd766, pnp_id("PNP", 0x0100));
dma = add_sub_device("ISA DMA Controller",
amd766, pnp_id("PNP", 0x0200));
speaker = add_sub_device("PC Speaker",
amd766, pnp_id("PNP", 0x0800));
mc146818rtc = add_sub_device("Real Time Clock",
amd766, pnp_id("PNP", 0x0B00));
ioapic = add_sub_device("IOAPIC",
amd766, part_number("Intel", "82093AA"));
irq_router = add_sub_device("IRQ Router",
amd766, part_number_function("AMD", "766", "irq_router");
/* AIC7899W */
scsi0 = add_sub_device("SCSI0", aic7899w, pci_id(0x900f, 0x00cf));
scsi1 = add_sub_device("SCSI1", aic7899w, pci_id(0x900f, 0x00cf));
/* SuperIO */
fd0 = add_sub_device("fd0", superio, pnp_id("PNP", 0x0700));
lpt0 = add_sub_device("lpt0", superio, pnp_id("PNP", 0x0401));
ttyS0 = add_sub_device("ttyS0", superio, pnp_id("PNP", 0x0501));
ttyS1 = add_sub_device("ttyS1", superio, pnp_id("PNP", 0x0501));
/* Is this the correct pnpid for a ps2 keyboard controller? */
kbc = add_sub_device("kbc", superio, pnp_id("PNP", 0x0303));
cir = add_sub_device("cir", superio, pnp_id("PNP", 0x0511));
js0 = add_sub_device("js0", superio, pnp_id("PNP", 0xb02f));
gpio0 = add_sub_device("GPIO0",
superio, part_number_function("Winbond", "W83627HF", "gpio0");
gpio1 = add_sub_device("GPIO1",
superio, part_number_function("Winbond", "W83627HF", "gpio1");
apci = add_sub_device("ACPI", superio, pnp_id("PNP", 0x0c08));
hwmon = add_sub_device("HWMON", superio,
superio, part_number_function("Winbond", "W83627HF", "hwmon");
cpu0_link = add_link("CPU0 link", 1);
bilink(cpu0_link, cpu0, 0, 1, 1, 1);
bilink(cpu0_ilnk, amd762, 1, 1, 0, 1);
cpu1_link = add_link("CPU1 link", 1);
bilink(cpu1_link, cpu1, 0, 1, 1, 1);
bilink(cpu1_ilnk, amd762, 1, 1, 0, 1);
memory_bus = add_link("Memory bus", 3);
slave_link("memory bus", memory_bus, dimm0, 0, 1);
slave_link("memory bus", memory_bus, dimm1, 1, 1);
slave_link("memory bus", memory_bus, dimm2, 2, 1);
slave_link("memory bus", memory_bus, dimm3, 3, 1);
master_entire_link("memory bus", memory_bus, amd762);
/* There are four addresses per irq pin.
* trigger 0 == Edge Triggered
* trigger 1 == Level Triggered
* polarity 0 == polarity low
* polarity 1 == polarity high
* 01 == Edge Triggered, polarity high
* 10 == Level Triggered, polarity low
* 11 == Level Triggered, polarity low
*/
pirqs = add_irq_ubs("PIRQS", 3);
isa_irq = add_irq_bus("ISA IRQ bus", 15);
apic_bus = add_irq_bus("APIC IRQ bus", 255);
/* IRQ resources of the irq router. */
add_routed_irq("pirqa", pirqs, isa_irq, irq_router, 0, 0, 15);
add_routed_irq("pirqb", pirqs, isa_irq, irq_router, 1, 0, 15);
add_routed_irq("pirqc", pirqs, isa_irq, irq_router, 2, 0, 15);
add_routed_irq("pirqd", pirqs, isa_irq, irq_router, 3, 0, 15);
/* IRQ resources of the ioapic */
add_routed_irq("pin1", isa_irq, apci_bus, ioapic, 1, 0, 255);
add_routed_irq("pin2", isa_irq, apci_bus, ioapic, 0, 0, 255);
add_routed_irq("pin3", isa_irq, apci_bus, ioapic, 3, 0, 255);
add_routed_irq("pin4", isa_irq, apci_bus, ioapic, 4, 0, 255);
add_routed_irq("pin5", isa_irq, apci_bus, ioapic, 5, 0, 255);
add_routed_irq("pin6", isa_irq, apci_bus, ioapic, 6, 0, 255);
add_routed_irq("pin7", isa_irq, apci_bus, ioapic, 7, 0, 255);
add_routed_irq("pin8", isa_irq, apci_bus, ioapic, 8, 0, 255);
add_routed_irq("pin9", isa_irq, apci_bus, ioapic, 9, 0, 255);
add_routed_irq("pin10", isa_irq, apci_bus, ioapic, 10, 0, 255);
add_routed_irq("pin11", isa_irq, apci_bus, ioapic, 11, 0, 255);
add_routed_irq("pin12", isa_irq, apci_bus, ioapic, 12, 0, 255);
add_routed_irq("pin13", isa_irq, apci_bus, ioapic, 13, 0, 255);
add_routed_irq("pin14", isa_irq, apci_bus, ioapic, 14, 0, 255);
add_routed_irq("pin15", isa_irq, apci_bus, ioapic, 15, 0, 255);
add_routed_irq("pin16", pirqs, apci_bus, ioapic, 0, 0, 255);
add_routed_irq("pin17", pirqs, apci_bus, ioapic, 1, 0, 255);
add_routed_irq("pin18", pirqs, apci_bus, ioapic, 2, 0, 255);
add_routed_irq("pin19", pirqs, apci_bus, ioapic, 3, 0, 255);
/* PCI devices and irqs */
pci_bus0 = add_pci_bus(0);
pcidev(pci_bus0, DEVFN(0x00,0), pirqs, -1, -1, -1, -1, hostbridge);
pcidev(pci_bus0, DEVFN(0x00,0), pirqs, -1, -1, -1, -1, agpbridge);
pcidev(pci_bus0, DEVFN(0x07,0), pirqs, -1, -1, -1, -1, isa_bridge);
pcidev(pci_bus0, DEVFN(0x07,1), pirqs, -1, -1, -1, -1, ide_bridge);
pcidev(pci_bus0, DEVFN(0x07,3), pirqs, -1, -1, -1, -1, pm_bridge);
pcidev(pci_bus0, DEVFN(0x07,4), pirqs, -1, -1, -1, -1, usb_bridge);
pcislot(pci_bus0, DEVFN(0x08,0), pirqs, 0, -1, -1, -1, pci_slot0);
pcislot(pci_bus0, DEVFN(0x09,0), pirqs, 1, -1, -1, -1, pci_slot1);
pcislot(pci_bus0, DEVFN(0x0a,0), pirqs, 2, -1, -1, -1, pci_slot2);
pcislot(pci_bus0, DEVFN(0x0b,0), pirqs, 3, -1, -1, -1, pci_slot3);
pcislot(pci_bus0, DEVFN(0x0c,0), pirqs, 0, -1, -1, -1, pci_slot4);
pcidev(pci_bus0, DEVFN(0x0d,0), pirqs, 0, 1, -1, -1, scsi0);
pcidev(pci_bus0, DEVFN(0x0d,1), pirqs, 0, 1, -1, -1, scsi1);
pcidev(pci_bus0, DEVFN(0x0e,0), pirqs, -1, -1, -1, -1, rage_xl);
pcidev(pci_bus0, DEVFN(0x0f,0), pirqs, 2, -1, -1, -1, eth0);
pcidev(pci_bus0, DEVFN(0x10,0), pirqs, 3, -1, -1, -1, eth1);
}
Eric
