Eric W. Biederman wrote:

> 
> It sounds like it.  Can you configure a serial console and get a log
> of what is going on?  This isn't an error I'm familiar with....
> It sounds like something may be rebooting the machine but otherwise
> I'm blind.
> 


With the attached Config.etherboot-elf for Etherboot, I got something
like minicom.cap. It seems that the kernel has been downloaded
correct but somehow Etherboot refuse to boot the downloaded image.
The same Config.etherboot-elf works for sis900.fd0.

My sample config file for build LinuxBIOS is also attached.

Ollie

#
# Config for Etherboot/32
#
# Do not delete the tag OptionDescription and /OptionDescription
# It is used to automatically generate the documentation.
#
# <OptionDescription>
#       User interaction options:
#
#       -DASK_BOOT=n
#                       Ask "Boot from Network or from Local? " at startup,
#                       timeout after n seconds (0 = no timeout); this
#                       can be done in a more generic way by using the
#                       IMAGE_MENU, but it requires that the "bootp"
#                       server is accessible, even when booting locally.
#                       If unset, boot immediately using the default.
#       -DANS_DEFAULT=ANS_NETWORK
#                       Assume Network to previous question
#                       (alternative: ANS_LOCAL) on timeout or Return key
#                       See etherboot.h for prompt and answer strings.
#       -DBAR_PROGRESS
#                       Use rotating bar instead of sequential dots
#                       to indicate an IP packet transmitted.
#       -DMOTD
#                       Display message of the day; read vendortags.html
#                       for further information.
#       -DIMAGE_MENU
#                       Allow to interactively chose between different
#                       bootimages; read vendortags.html for further
#                       information.
#       -DPASSWD
#                       Enable password protection for boot images; this
#                       requires -DIMAGE_MENU.
#       -DUSRPARMS
#                       Allow the user to interactively edit parameters
#                       that are passed to the booted kernel; you should
#                       probably enable -DPASSWD as well; this feature
#                       requires -DIMAGE_MENU.
#       -DANSIESC
#                       Evaluate a subset of common ANSI escape sequences
#                       when displaying the message of the day; this
#                       probably does not make sense unless you also
#                       define -DMOTD or at least -DIMAGE_MENU. It is
#                       possible to combine this option with -DCONSOLE_DUAL,
#                       but you have to be aware that the boot menu will
#                       no longer use ANSI escapes to be compatible with the
#                       serial console. Also be careful with your banners, as
#                       they may confuse your serial console. Generally you
#                       lose most of the ANSIESC functionality..
#       -DGFX
#                       Support extensions to the ANSI escape sequences for
#                       displaying graphics (icons or logos); this
#                       requires -DANSIESC. It probably does not make sense
#                       to use -DGFX if you have -DCONSOLE_DUAL, as the
#                       serial console normally cannot handle the GFX stuff.
#       -DSHOW_NUMERIC
#                       Display menu item labels as numbers.
#       -DDELIMITERLINES
#                       Print a line of = characters at the start
#                       and also just before starting an image.
#       -DSIZEINDICATOR
#                       Update a running total of the amount of code
#                       loaded so far, in kilobytes.
#
#       Boot autoconfiguration protocol options:
#
#       -DNO_DHCP_SUPPORT
#                       Use BOOTP instead of DHCP.
#       -DRARP_NOT_BOOTP
#                       Use RARP instead of BOOTP/DHCP.
#       -DREQUIRE_VCI_ETHERBOOT
#                       Require an encapsulated Vendor Class Identifier
#                       of "Etherboot" in the DHCP reply
#                       Requires DHCP support.
#
#       Boot tuning parameters:
#
#       -DCONGESTED
#                       Turns on packet retransmission.  Use it on a
#                       congested network, where the normal operation
#                       can't boot the image.
#       -DBACKOFF_LIMIT
#                       Sets the maximum RFC951 backoff exponent to n.
#                       Do not set this unreasonably low, because on networks
#                       with many machines they can saturate the link
#                       (the delay corresponding to the exponent is a random
#                       time in the range 0..3.5*2^n seconds).  Use 5 for a
#                       VERY small network (max. 2 minutes delay), 7 for a
#                       medium sized network (max. 7.5 minutes delay) or 10
#                       for a really huge network with many clients, frequent
#                       congestions (max. 1  hour delay).  On average the
#                       delay time will be half the maximum value.  If in
#                       doubt about the consequences, use a larger value.
#                       Also keep in mind that the number of retransmissions
#                       is not changed by this setting, so the default of 20
#                       may no longer be appropriate.  You might need to set
#                       MAX_ARP_RETRIES, MAX_BOOTP_RETRIES, MAX_TFTP_RETRIES
#                       and MAX_RPC_RETRIES to a larger value.
#
#       Boot device options:
#
#       -DCAN_BOOT_DISK
#                       Can boot from floppy/hd if bootimage matches the
#                       pattern "/dev/[fhs]d*".
#       -DTRY_FLOPPY_FIRST
#                       If > 0, tries that many times to read the boot
#                       sector from a floppy drive before booting from
#                       ROM. If successful, does a local boot.
#                       It assumes the floppy is bootable.
#                       Requires -DCAN_BOOT_DISK.
#       -DEMERGENCYDISKBOOT
#                       If no BOOTP server can be found, then boot from
#                       local disk. The accessibility of the TFTP server
#                       has no effect, though! So configure your BOOTP
#                       server properly. You should probably reduce
#                       MAX_BOOTP_RETRIES to a small number like 3.
#
#       Boot image options:
#
#       -DTAGGED_IMAGE
#                       Add tagged image kernel boot support (recommended).
#       -DAOUT_IMAGE
#                       Add a.out kernel boot support (generic).
#       -DELF_IMAGE
#                       Add generic ELF kernel boot support (recommended).
#       -DIMAGE_MULTIBOOT
#                       Add Multiboot image support (currently only
#                       for ELF images).
#                       Without this, generic ELF support is selected.
#       -DIMAGE_FREEBSD
#                       Add FreeBSD image loading support (requires at least
#                       -DAOUT_IMAGE and/or -DELF_IMAGE).
#       -DFREEBSD_KERNEL_ENV
#                       Pass in FreeBSD kernel environment
#       -DDOWNLOAD_PROTO_TFTP
#                       If defined, boots by TFTP (recommended).
#       -DDOWNLOAD_PROTO_NFS
#                       If defined, boots from a NFS mount and disables
#                       TFTP loading. Default is DOWNLOAD_PROTO_TFTP
#                       if neither is defined.
#
#       Console options:
#
#       -DCONSOLE_CRT
#                       Set for CRT console (default if nothing else is set).
#       -DCONSOLE_SERIAL
#                       Set for serial console.
#       -DCONSOLE_DUAL
#                       Set for CRT and serial console, see comment at
#                       -DANSIESC and -DGFX.
#       -DCOMCONSOLE
#                       Set port, e.g. 0x3F8.
#       -DCONSPEED
#                       Set speed, e.g. 57600.
#       -DCOMPARM
#                       Set Line Control Register value for data bits, stop
#                       bits and parity. See a National Semiconditor 8250/
#                       16450/16550 data sheet for bit meanings.
#                       If undefined, defaults to 0x03 = 8N1.
#
#       BIOS interface options:
#
#       -DPNP_BUT_NOT_BBS_COMPLIANT
#                       Some BIOSes claim to be PNP but they don't conform
#                       to the BBS spec which specifies that ES:DI must
#                       point to the string $PnP on entry. This option
#                       works around those.
#       -DNO_DELAYED_INT
#                       Take control as soon as BIOS detects the ROM.
#                       Normally hooks onto INT18H or INT19H. Use only if you
#                       have a very non-conformant BIOS as it bypasses
#                       BIOS initialisation of devices. This only works for
#                       legacy ROMs, i.e. PCI_PNP_HEADER not defined.
#                       This option was formerly called NOINT19H.
#       -DBOOT_INT18H
#                       Etherboot normally hooks onto INT19H for legacy ROMs.
#                       You can choose to hook onto INT18H (BASIC interpreter
#                       entry point) instead. This entry point is used when
#                       all boot devices have been exhausted.
#       -DCONFIG_PCI_DIRECT
#                       Define this for PCI BIOSes that do not implement
#                       BIOS32 or not correctly. Normally not needed.
#                       Only works for BIOSes of a certain era.
#       -DCONFIG_TSC_CURRTICKS
#                       Uses the processor time stamp counter instead of reading
#                       the BIOS time counter.  This allows Etherboot to work
#                       even without a BIOS.  This only works on late model
#                       486s and above.
#
#       Obscure options you probably don't need to touch:
#
#       -DPOWERSAVE
#                       Halt the processor when waiting for keyboard input
#                       which saves power while waiting for user interaction.
#                       Good for compute clusters and VMware emulation.
#                       But may not work for all CPUs.
#       -DT503_AUI
#                       Use AUI by default on 3c503 cards.
#       -DMOVEROM
#                       If your motherboard does not cache adapter memory
#                       space, then this option can speed up loading of
#                       compressed BOOT-Prom images. It has no effect on
#                       uncompressed images. Unless you are very tight on
#                       free space, you will usually want to define this
#                       option.  This flag must be added to LCONFIG!
#                       (recommended).
#       -DUSE_LOWMEM_BUFFER
#                       Define to put some buffers below 0x10000 which
#                       may interfere with other programs (not recommended).
# </OptionDescription>

# These default settings compile Etherboot with a small number of options.
# You may wish to enable more of the features if the size of your ROM allows.

# For prompting and default on timeout
#CFLAGS32+=     -DASK_BOOT=3 -DANS_DEFAULT=ANS_NETWORK
# If you prefer the old style rotating bar progress display
# CFLAGS32+=    -DBAR_PROGRESS
#CFLAGS32+=     -DMOTD -DIMAGE_MENU

# Enabling this makes the boot ROM require a Vendor Class Identifier
# of "Etherboot" in the Vendor Encapsulated Options
# This can be used to reject replies from servers other than the one
# we want to give out addresses to us, but it will prevent Etherboot
# from getting an IP lease until you have configured DHCPD correctly
# CFLAGS32+=    -DREQUIRE_VCI_ETHERBOOT

# Limit the delay on packet loss/congestion to a more bearable value. See
# description above.  If unset, do not limit the delay between resend.
#CFLAGS32+=     -DBACKOFF_LIMIT=7

# More optional features
# CFLAGS32+=    -DANSIESC -DGFX
# CFLAGS32+=    -DPASSWD -DUSRPARMS
# CFLAGS32+=    -DCAN_BOOT_DISK -DTRY_FLOPPY_FIRST=4

# For a serial console, which can run in parallel with CRT console
# CFLAGS32+=    -DCONSOLE_DUAL -DCOMCONSOLE=0x3F8 -DCONSPEED=9600

# Enable tagged image, generic ELF, Multiboot ELF
# or FreeBSD ELF/a.out boot image support
# CFLAGS32+=    -DTAGGED_IMAGE -DELF_IMAGE
# CFLAGS32+=    -DAOUT_IMAGE -DIMAGE_MULTIBOOT -DIMAGE_FREEBSD

# Change download protocol to NFS, default is TFTP
# CFLAGS32+=    -DDOWNLOAD_PROTO_NFS

# Options to make a version of Etherboot that will work under linuxBIOS.
CFLAGS32+= -DCONFIG_TSC_CURRTICKS  -DCONSOLE_SERIAL -DCOMCONSOLE=0x3f8 
-DCONSPEED=115200 -DCONFIG_PCI_DIRECT -DELF_IMAGE #-DIMAGE_MULTIBOOT
#CFLAGS32+= -DCONFIG_TSC_CURRTICKS -DCONFIG_PCI_DIRECT -DELF_IMAGE #-DIMAGE_MULTIBOOT
CFLAGS32+= -DCONGESTED

# These flags affect the loader that is prepended to the Etherboot image
LCONFIG+=       -DMOVEROM

# you should normally not need to change these
RM=             rm -f
TOUCH=          touch
CC32=           gcc
AS32=           as
LD32=           ld
SIZE32=         size
AR32=           ar
RANLIB32=       ranlib

# If you use egcs or gcc-2.8, using -Os may help to reduce the code size.
# Otherwise use -O2 (under no circumstance use -O3 or above!).
CFLAGS32+=      -Os -ffreestanding -fstrength-reduce -fomit-frame-pointer -mcpu=i386
# Squeeze the code in as little space as possible.
CFLAGS32+=      -malign-jumps=1 -malign-loops=1 -malign-functions=1
CFLAGS32+=      -Wall -W -Wno-format -Wno-unused
ASFLAGS32=
LDFLAGS32+=     -N -Ttext $(RELOCADDR) -e _start
LDBINARY32=     --oformat binary        # flag for headerless binary
LIBC32=                                 # not needed
# Sample config file for Winfast 6300 with DoC Millennium (as root)
# This will make a target directory of ./winfast
target winfast-elf-etherboot 

# WinFast 6300 MAX mainboard
mainboard leadtek/winfast6300

# Enable Serial Console for debugging
option SERIAL_CONSOLE=1

# use DOC MIL
#option USE_DOC_MIL_PLUS
#option INTERLEAVE=2
option USE_DOC_MIL
docipl northsouthbridge/sis/630/ipl.S

# Enable MicroCode update and L2 Cache init for PII and PIII
option UPDATE_MICROCODE
option CONFIGURE_L2_CACHE

# Enable CPU Piple Line function, if your are not
# using PIII, this boost performance a lot
option ENABLE_SIS630_CPU_PIPELINE

# Use the internal VGA frame buffer device
option HAVE_FRAMEBUFFER

option DISABLE_INTERNAL_DEVICES

#use ELF Loader to lod Etherboot
option USE_ELF_BOOT

# FixME: Should we change the following to something like
# payload elf
# Path to your kernel (vmlinux)
linux /usr/src/linux

# Kernel command line parameters
commandline root=/dev/hda1 console=ttyS0,115200 console=tty0 
video=sisfb:1024x768-32@85,font:VGA8x16


LinuxBIOS starting...
Ram Initialize?
before mainLinuxBIOS booting...
Finding PCI configuration type.
PCI: Using configuration type 1
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 0, Superio SiS 950
handle_superio  port 0x0, defaultport 0x2e
handle_superio  Using port 0x2e
handle_superio done
Scanning PCI bus...PCI: pci_scan_bus for bus 0
pci_get_sizedev_fn 0x0, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:00 [1039/0630]
pci_get_sizedev_fn 0x1, register 0, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 1, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 2, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 3, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 4, read-only SO, ignoring it
addr was 0xfffffff1, size was 0xfffffff1
pci_get_sizedev_fn 0x1, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:01 [1039/5513]
pci_get_sizedev_fn 0x8, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:08 [1039/0008]
pci_get_sizedev_fn 0xc, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:0c [1039/7018]
pci_get_sizedev_fn 0x10, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x10, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:10 [1039/0001]
pci_get_sizedev_fn 0x58, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:58 [1039/0900]
PCI: pci_scan_bus for bus 1
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 01:00 [1039/6300]
PCI: pci_scan_bus returning with max=01
PCI: pci_scan_bus returning with max=01
done
totalram: 56M
Initializing CPU #0
Updating microcode
microcode_info: sig = 0x00000665 pf=0x00000010 rev = 0x00000000
Enabling cache...
Setting variable MTRR 0, base:    0MB, range:   64MB, type: WB
Setting variable MTRR 1, base:   56MB, range:    8MB, type: UC
done.

Max cpuid index    : 2
Vendor ID          : GenuineIntel
Processor Type     : 0x00
Processor Family   : 0x06
Processor Model    : 0x06
Processor Mask     : 0x00
Processor Stepping : 0x05
Feature flags      : 0x0183fbff

Cache/TLB descriptor values: 1 reads required
Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries
Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries
Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x40 : No L2 cache
Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size
Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries
Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size



MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Configuring L2 cache...Disable Cache
rdmsr(0x17) = 0, 14b00000
L2 Cache latency is 5
Sending 0 to set_l2_register4
L2 ECC Checking is enabled
L2 Physical Address Range is 4096M
Maximum cache mask is 2000
L2 Cache Mask is 0
read_l2(2) = 0
write_l2(2) = 0
Enable Cache
L2 Cache size is 128K
L2 Cache lines initialized
Disable Cache
Enable Cache
done.
Disabling local apic...done.
CPU #0 Initialized
Allocating PCI resources...COMPUTE_ALLOCATE: do IO
compute_allocate_io: base 0x1000
compute_allocate_io: base 0x1000
DEVIO: Bus 0x1, devfn 0x0, reg 0x2: iosize 0x80
-->set base to 0x1000
BUS 1: set iolimit to 0x1fff
BUSIO: done Bridge Bus 0x1, iobase now 0x2000
DEVIO: Bus 0x0, devfn 0xc, reg 0x0: iosize 0x100
-->set base to 0x2000
DEVIO: Bus 0x0, devfn 0x58, reg 0x0: iosize 0x100
-->set base to 0x2100
BUS 0: set iolimit to 0x2fff
COMPUTE_ALLOCATE: do MEM
compute_allocate_mem: base 0x80000000
compute_allocate_mem: base 0x80000000
DEVMEM: Bus 0x1, devfn 0x0, reg 0x1: memsize 0x20000
-->set base to 0x80000000
BUS 1: set memlimit to 0x800fffff
BUSMEM: Bridge Bus 0x1,membase now 0x80100000
DEVMEM: Bus 0x0, devfn 0x0, reg 0x0: memsize 0x8000000
-->set base to 0x88000000
DEVMEM: Bus 0x0, devfn 0xc, reg 0x1: memsize 0x1000
-->set base to 0x90000000
DEVMEM: Bus 0x0, devfn 0x58, reg 0x1: memsize 0x1000
-->set base to 0x90001000
BUS 0: set memlimit to 0x900fffff
COMPUTE_ALLOCATE: do PREFMEM
Compute_allocate_prefmem: base 0x90100000
Compute_allocate_prefmem: base 0x90100000
DEVPREFMEM: Bus 0x1, devfn 0x0, reg 0x0: prefmemsize 0x8000000
-->set base to 0x98000000
BUS 1: set prefmemlimit to 0x9fffffff
BUSPREFMEM: Bridge Bus 0x1, prefmem base now 0xa0000000
BUS 0: set prefmemlimit to 0x9fffffff
ASSIGN RESOURCES, bus 0
Bus 0x0 iobase to 0x1000 iolimit 0x1fff
Bus 0x0 membase to 0x80000000 memlimit 0x800fffff
Bus 0x0 prefmembase to 0x90100000 prefmemlimit 0x9fffffff
Bus 0x0 devfn 0x0 reg 0x0 base to 0x88000000
Bus 0x0 devfn 0xc reg 0x0 base to 0x2001
Bus 0x0 devfn 0xc reg 0x1 base to 0x90000000
Bus 0x0 devfn 0x58 reg 0x0 base to 0x2101
Bus 0x0 devfn 0x58 reg 0x1 base to 0x90001000
Bus 0x1 devfn 0x0 reg 0x0 base to 0x98000000
Bus 0x1 devfn 0x0 reg 0x1 base to 0x80000000
Bus 0x1 devfn 0x0 reg 0x2 base to 0x1001
done.
Enabling PCI resourcess...DEV Set command bus 0x00 devfn 0x00 to 0x07
DEV Set command bus 0x00 devfn 0x01 to 0x00
DEV Set command bus 0x00 devfn 0x08 to 0x0c
DEV Set command bus 0x00 devfn 0x0c to 0x03
DEV Set command bus 0x00 devfn 0x10 to 0x27
DEV Set command bus 0x00 devfn 0x58 to 0x07
DEV Set command bus 0x01 devfn 0x00 to 0x03
done.
Enabled in SIS 503 regs 0x40 and 0x45
Now try to turn off shadow
device for SiS 630 is 0x5ca8
Shadow memory disabled in SiS 630
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 1, Superio SiS 950
handle_superio  port 0x2e, defaultport 0x2e
handle_superio  Using port 0x2e
handle_superio done
Zeroing PCI IRQ settings...done.
Copying IRQ routing tables...done.
Winfast 6300 (and similar)...acpibase was 0x5000
acpibase is 0xc000
acpi enable reg was 0x33
acpi enable reg after set is 0xb3
acpi status: word at 0x56 is 0x0
acpi status: byte at 0x4b is 0x0
acpibase + 0x56 is 0x40
acpi disable reg after set is 0x33
Entering the initregs process
Southbridge fixup done for SIS 503
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 2, Superio SiS 950
handle_superio  port 0x2e, defaultport 0x2e
handle_superio  Using port 0x2e
  Call finishup
handle_superio done
Jumping to linuxbiosmain()...

Welcome to elfboot, the open sourced starter.
Febuary 2001, Eric Biederman.
Version 0.99

    83:fill_inbuf() - ram buffer:0x00005f8c
   123:fill_inbuf() - nvram:0x00010000  block_count:0
Clearing Section: addr: 0x0000000000097e88 memsz: 0x0000000000003d54
Loading Section: addr: 0x0000000000094000 memsz: 0x0000000000007bdc filesz: 
0x0000000000003e88
Jumping to boot code
ROM segment 0x66a5 length 0x414a reloc 0x9400
clocks_per_tick = 230452
Etherboot 5.0.4 (GPL) ELF for [SIS900]
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex 
Searching for server (DHCP)...
..Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... 
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................done
0

LinuxBIOS starting...
Ram Initialize?
before mainLinuxBIOS booting...
Finding PCI configuration type.
PCI: Using configuration type 1
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 0, Superio SiS 950
handle_superio  port 0x0, defaultport 0x2e
handle_superio  Using port 0x2e
handle_superio done
Scanning PCI bus...PCI: pci_scan_bus for bus 0
pci_get_sizedev_fn 0x0, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:00 [1039/0630]
pci_get_sizedev_fn 0x1, register 0, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 1, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 2, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 3, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 4, read-only SO, ignoring it
addr was 0xfffffff1, size was 0xfffffff1
pci_get_sizedev_fn 0x1, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:01 [1039/5513]
pci_get_sizedev_fn 0x8, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:08 [1039/0008]
pci_get_sizedev_fn 0xc, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:0c [1039/7018]
pci_get_sizedev_fn 0x10, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x10, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:10 [1039/0001]
pci_get_sizedev_fn 0x58, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:58 [1039/0900]
PCI: pci_scan_bus for bus 1
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 01:00 [1039/6300]
PCI: pci_scan_bus returning with max=01
PCI: pci_scan_bus returning with max=01
done
totalram: 56M
Initializing CPU #0
Updating microcode
microcode_info: sig = 0x00000665 pf=0x00000010 rev = 0x00000000
Enabling cache...
Setting variable MTRR 0, base:    0MB, range:   64MB, type: WB
Setting variable MTRR 1, base:   56MB, range:    8MB, type: UC
done.

Max cpuid index    : 2
Vendor ID          : GenuineIntel
Processor Type     : 0x00
Processor Family   : 0x06
Processor Model    : 0x06
Processor Mask     : 0x00
Processor Stepping : 0x05
Feature flags      : 0x0183fbff

Cache/TLB descriptor values: 1 reads required
Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries
Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries
Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x40 : No L2 cache
Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size
Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries
Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size



MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Configuring L2 cache...Disable Cache
rdmsr(0x17) = 0, 14b00000
L2 Cache latency is 5
Sending 0 to set_l2_register4
L2 ECC Checking is enabled
L2 Physical Address Range is 4096M
Maximum cache mask is 2000
L2 Cache Mask is 0
read_l2(2) = 0
write_l2(2) = 0
Enable Cache
L2 Cache size is 128K
L2 Cache lines initialized
Disable Cache
Enable Cache
done.
Disabling local apic...done.
CPU #0 Initialized
Allocating PCI resources...COMPUTE_ALLOCATE: do IO
compute_allocate_io: base 0x1000
compute_allocate_io: base 0x1000
DEVIO: Bus 0x1, devfn 0x0, reg 0x2: iosize 0x80
-->set base to 0x1000
BUS 1: set iolimit to 0x1fff
BUSIO: done Bridge Bus 0x1, iobase now 0x2000
DEVIO: Bus 0x0, devfn 0xc, reg 0x0: iosize 0x100
-->set base to 0x2000
DEVIO: Bus 0x0, devfn 0x58, reg 0x0: iosize 0x100
-->set base to 0x2100
BUS 0: set iolimit to 0x2fff
COMPUTE_ALLOCATE: do MEM
compute_allocate_mem: base 0x80000000
compute_allocate_mem: base 0x80000000
DEVMEM: Bus 0x1, devfn 0x0, reg 0x1: memsize 0x20000
-->set base to 0x80000000
BUS 1: set memlimit to 0x800fffff
BUSMEM: Bridge Bus 0x1,membase now 0x80100000
DEVMEM: Bus 0x0, devfn 0x0, reg 0x0: memsize 0x8000000
-->set base to 0x88000000
DEVMEM: Bus 0x0, devfn 0xc, reg 0x1: memsize 0x1000
-->set base to 0x90000000
DEVMEM: Bus 0x0, devfn 0x58, reg 0x1: memsize 0x1000
-->set base to 0x90001000
BUS 0: set memlimit to 0x900fffff
COMPUTE_ALLOCATE: do PREFMEM
Compute_allocate_prefmem: base 0x90100000
Compute_allocate_prefmem: base 0x90100000
DEVPREFMEM: Bus 0x1, devfn 0x0, reg 0x0: prefmemsize 0x8000000
-->set base to 0x98000000
BUS 1: set prefmemlimit to 0x9fffffff
BUSPREFMEM: Bridge Bus 0x1, prefmem base now 0xa0000000
BUS 0: set prefmemlimit to 0x9fffffff
ASSIGN RESOURCES, bus 0
Bus 0x0 iobase to 0x1000 iolimit 0x1fff
Bus 0x0 membase to 0x80000000 memlimit 0x800fffff
Bus 0x0 prefmembase to 0x90100000 prefmemlimit 0x9fffffff
Bus 0x0 devfn 0x0 reg 0x0 base to 0x88000000
Bus 0x0 devfn 0xc reg 0x0 base to 0x2001
Bus 0x0 devfn 0xc reg 0x1 base to 0x90000000
Bus 0x0 devfn 0x58 reg 0x0 base to 0x2101
Bus 0x0 devfn 0x58 reg 0x1 base to 0x90001000
Bus 0x1 devfn 0x0 reg 0x0 base to 0x98000000
Bus 0x1 devfn 0x0 reg 0x1 base to 0x80000000
Bus 0x1 devfn 0x0 reg 0x2 base to 0x1001
done.
Enabling PCI resourcess...DEV Set command bus 0x00 devfn 0x00 to 0x07
DEV Set command bus 0x00 devfn 0x01 to 0x00
DEV Set command bus 0x00 devfn 0x08 to 0x0c
DEV Set command bus 0x00 devfn 0x0c to 0x03
DEV Set command bus 0x00 devfn 0x10 to 0x27
DEV Set command bus 0x00 devfn 0x58 to 0x07
DEV Set command bus 0x01 devfn 0x00 to 0x03
done.
Enabled in SIS 503 regs 0x40 and 0x45
Now try to turn off shadow
device for SiS 630 is 0x5ca8
Shadow memory disabled in SiS 630
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 1, Superio SiS 950
handle_superio  port 0x2e, defaultport 0x2e
handle_superio  Using port 0x2e
handle_superio done
Zeroing PCI IRQ settings...done.
Copying IRQ routing tables...done.
Winfast 6300 (and similar)...acpibase was 0x5000
acpibase is 0xc000
acpi enable reg was 0x33
acpi enable reg after set is 0xb3
acpi status: word at 0x56 is 0x0
acpi status: byte at 0x4b is 0x0
acpibase + 0x56 is 0x40
acpi disable reg after set is 0x33
Entering the initregs process
Southbridge fixup done for SIS 503
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 2, Superio SiS 950
handle_superio  port 0x2e, defaultport 0x2e
handle_superio  Using port 0x2e
  Call finishup
handle_superio done
Jumping to linuxbiosmain()...

Welcome to elfboot, the open sourced starter.
Febuary 2001, Eric Biederman.
Version 0.99

    83:fill_inbuf() - ram buffer:0x00005f8c
   123:fill_inbuf() - nvram:0x00010000  block_count:0
Clearing Section: addr: 0x0000000000097e88 memsz: 0x0000000000003d54
Loading Section: addr: 0x0000000000094000 memsz: 0x0000000000007bdc filesz: 
0x0000000000003e88
Jumping to boot code
ROM segment 0x66a5 length 0x414a reloc 0x9400
clocks_per_tick = 230452
Etherboot 5.0.4 (GPL) ELF for [SIS900]
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex 
Searching for server (DHCP)...
.....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... 
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