Eric W. Biederman wrote:
>>We found that the elfImage generated by mkelfImage can not be loaded
>>by Etherboot (with -DELF_IMAGE). We have to use mkelf-linux form mknbi
>>to generate a Etherboot bootable ELF image. We also found that with
>>-DMULTIBOOT, nothing boots. Can you give me more explaination on these
>>stuff ??
>>
>
> O.k. The quick answer is that mknbi assumes you have a BIOS and will
> set the kernel up to do 16 bit BIOS calls before booting. That will not work
> under linuxbios. The multiboot specifcation passes on things like memory size
> and mkelfImage can use that information instead of trying 16bit queries.
>
> I am 90% certain that what you are seeing is the cpu tripple faulting
> and rebooting when the mknbi ELF kernel attempts 16 bit BIOS calls.
>
> Attached is my configuration for etherboot for use with linuxbios.
> Just in case the version of mkelfImage in CVS is bad please look at:
> ftp://download.lnxi.com/pub/src/mkelfImage.
> Every version I have should be up there..
With your Config.etherboot and MkelfImage in LinuxBIOS tree, I still got
error message like:
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
It seems that ube.c does not pass the correct totalmem. How can I solve
this problem ??
Ollie
....0
LinuxBIOS starting...
Ram Initialize?
before mainLinuxBIOS booting...
Finding PCI configuration type.
PCI: Using configuration type 1
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 0, Superio SiS 950
handle_superio port 0x0, defaultport 0x2e
handle_superio Using port 0x2e
handle_superio done
Scanning PCI bus...PCI: pci_scan_bus for bus 0
pci_get_sizedev_fn 0x0, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:00 [1039/0630]
pci_get_sizedev_fn 0x1, register 0, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 1, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 2, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 3, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 4, read-only SO, ignoring it
addr was 0xfffffff1, size was 0xfffffff1
pci_get_sizedev_fn 0x1, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:01 [1039/5513]
pci_get_sizedev_fn 0x8, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:08 [1039/0008]
pci_get_sizedev_fn 0xc, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:0c [1039/7018]
pci_get_sizedev_fn 0x10, dregister 0, reay SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x10, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:10 [1039/0001]
pci_get_sizedev_fn 0x58, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:58 [1039/0900]
PCI: pci_scan_bus for bus 1
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 01:00 [1039/6300]
PCI: pci_scan_bus returning with max=01
PCI: pci_scan_bus returning with max=01
done
totalram: 56M
Initializing CPU #0
Updating microcode
microcode_info: sig = 0x00000665 pf=0x00000010 rev = 0x00000000
Enabling cache...
Setting variable MTRR 0, base: 0MB, range: 64MB, type: WB
Setting variable MTRR 1, base: 56MB, range: 8MB, type: UC
done.
Max cpuid index : 2
Vendor ID : GenuineIntel
Processor Type : 0x00
Processor Family : 0x06
Processor Model : 0x06
Processor Mask : 0x00
Processor Stepping : 0x05
Feature flags : 0x0183fbff
Cache/TLB descriptor values: 1 reads required
Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries
Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries
Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x40 : No L2 cache
Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size
Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries
Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Configuring L2 cache...Disable Cache
rdmsr(0x17) = 0, 14b00000
L2 Cache latency is 5
Sending 0 to set_l2_register4
L2 ECC Checking is enabled
L2 Physical Address Range is 4096M
Maximum cache mask is 2000
L2 Cache Mask is 0
read_l2(2) = 0
write_l2(2) = 0
Enable Cache
L2 Cache size is 128K
L2 Cache lines initialized
Disable Cache
Enable Cache
done.
Disabling local apic...done.
CPU #0 Initialized
Allocating PCI resources...COMPUTE_ALLOCATE: do IO
compute_allocate_io: base 0x1000
compute_allocate_io: base 0x1000
DEVIO: Bus 0x1, devfn 0x0, reg 0x2: iosize 0x80
-->set base to 0x1000
BUS 1: set iolimit to 0x1fff
BUSIO: done Bridge Bus 0x1, iobase now 0x2000
DEVIO: Bus 0x0, devfn 0xc, reg 0x0: iosize 0x100
-->set base to 0x2000
DEVIO: Bus 0x0, devfn 0x58, reg 0x0: iosize 0x100
-->set base to 0x2100
BUS 0: set iolimit to 0x2fff
COMPUTE_ALLOCATE: do MEM
compute_allocate_mem: base 0x80000000
compute_allocate_mem: base 0x80000000
DEVMEM: Bus 0x1, devfn 0x0, reg 0x1: memsize 0x20000
-->set base to 0x80000000
BUS 1: set memlimit to 0x800fffff
BUSMEM: Bridge Bus 0x1,membase now 0x80100000
DEVMEM: Bus 0x0, devfn 0x0, reg 0x0: memsize 0x8000000
-->set base to 0x88000000
DEVMEM: Bus 0x0, devfn 0xc, reg 0x1: memsize 0x1000
-->set base to 0x90000000
DEVMEM: Bus 0x0, devfn 0x58, reg 0x1: memsize 0x1000
-->set base to 0x90001000
BUS 0: set memlimit to 0x900fffff
COMPUTE_ALLOCATE: do PREFMEM
Compute_allocate_prefmem: base 0x90100000
Compute_allocate_prefmem: base 0x90100000
DEVPREFMEM: Bus 0x1, devfn 0x0, reg 0x0: prefmemsize 0x8000000
-->set base to 0x98000000
BUS 1: set prefmemlimit to 0x9fffffff
BUSPREFMEM: Bridge Bus 0x1, prefmem base now 0xa0000000
BUS 0: set prefmemlimit to 0x9fffffff
ASSIGN RESOURCES, bus 0
Bus 0x0 iobase to 0x1000 iolimit 0x1fff
Bus 0x0 membase to 0x80000000 memlimit 0x800fffff
Bus 0x0 prefmembase to 0x90100000 prefmemlimit 0x9fffffff
Bus 0x0 devfn 0x0 reg 0x0 base to 0x88000000
Bus 0x0 devfn 0xc reg 0x0 base to 0x2001
Bus 0x0 devfn 0xc reg 0x1 base to 0x90000000
Bus 0x0 devfn 0x58 reg 0x0 base to 0x2101
Bus 0x0 devfn 0x58 reg 0x1 base to 0x90001000
Bus 0x1 devfn 0x0 reg 0x0 base to 0x98000000
Bus 0x1 devfn 0x0 reg 0x1 base to 0x80000000
Bus 0x1 devfn 0x0 reg 0x2 base to 0x1001
done.
Enabling PCI resourcess...DEV Set command bus 0x00 devfn 0x00 to 0x07
DEV Set command bus 0x00 devfn 0x01 to 0x00
DEV Set command bus 0x00 devfn 0x08 to 0x0c
DEV Set command bus 0x00 devfn 0x0c to 0x03
DEV Set command bus 0x00 devfn 0x10 to 0x27
DEV Set command bus 0x00 devfn 0x58 to 0x03
DEV Set command bus 0x01 devfn 0x00 to 0x03
done.
Enabled in SIS 503 regs 0x40 and 0x45
Now try to turn off shadow
device for SiS 630 is 0x5ca8
Shadow memory disabled in SiS 630
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 1, Superio SiS 950
handle_superio port 0x2e, defaultport 0x2e
handle_superio Using port 0x2e
handle_superio done
Zeroing PCI IRQ settings...done.
Copying IRQ routing tables...done.
Winfast 6300 (and similar)...acpibase was 0x5000
acpibase is 0xc000
acpi enable reg was 0x33
acpi enable reg after set is 0xb3
acpi status: word at 0x56 is 0x0
acpi status: byte at 0x4b is 0x0
acpibase + 0x56 is 0x40
acpi disable reg after set is 0x33
Entering the initregs process
Southbridge fixup done for SIS 503
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 2, Superio SiS 950
handle_superio port 0x2e, defaultport 0x2e
handle_superio Using port 0x2e
Call finishup
handle_superio done
Jumping to linuxbiosmain()...
Welcome to elfboot, the open sourced starter.
Febuary 2001, Eric Biederman.
Version 0.99
83:fill_inbuf() - ram buffer:0x00005f8c
123:fill_inbuf() - nvram:0x00010000 block_count:0
Clearing Section: addr: 0x0000000000097ee8 memsz: 0x0000000000003d54
Loading Section: addr: 0x0000000000094000 memsz: 0x0000000000007c3c filesz:
0x0000000000003ee8
Jumping to boot code
ROM segment 0x66a5 length 0x414a reloc 0x9400
clocks_per_tick = 230452
Etherboot 5.0.4 (GPL) ELF (Multiboot) for [SIS900]
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel .....................
LinuxBIOS starting...
Ram Initialize?
before mainLinuxBIOS booting...
Finding PCI configuration type.
PCI: Using configuration type 1
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 0, Superio SiS 950
handle_superio port 0x0, defaultport 0x2e
handle_superio Using port 0x2e
handle_superio done
Scanning PCI bus...PCI: pci_scan_bus for bus 0
pci_get_sizedev_fn 0x0, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:00 [1039/0630]
pci_get_sizedev_fn 0x1, register 0, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 1, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 2, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 3, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 4, read-only SO, ignoring it
addr was 0xfffffff1, size was 0xfffffff1
pci_get_sizedev_fn 0x1, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:01 [1039/5513]
pci_get_sizedev_fn 0x8, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:08 [1039/0008]
pci_get_sizedev_fn 0xc, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:0c [1039/7018]
pci_get_sizedev_fn 0x10, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x10, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:10 [1039/0001]
pci_get_sizedev_fn 0x58, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:58 [1039/0900]
PCI: pci_scan_bus for bus 1
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 01:00 [1039/6300]
PCI: pci_scan_bus returning with max=01
PCI: pci_scan_bus returning with max=01
done
totalram: 56M
Initializing CPU #0
Updating microcode
microcode_info: sig = 0x00000665 pf=0x00000010 rev = 0x00000000
Enabling cache...
Setting variable MTRR 0, base: 0MB, range: 64MB, type: WB
Setting variable MTRR 1, base: 56MB, range: 8MB, type: UC
done.
Max cpuid index : 2
Vendor ID : GenuineIntel
Processor Type : 0x00
Processor Family : 0x06
Processor Model : 0x06
Processor Mask : 0x00
Processor Stepping : 0x05
Feature flags : 0x0183fbff
Cache/TLB descriptor values: 1 reads required
Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries
Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries
Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x40 : No L2 cache
Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size
Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries
Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Configuring L2 cache...Disable Cache
rdmsr(0x17) = 0, 14b00000
L2 Cache latency is 5
Sending 0 to set_l2_register4
L2 ECC Checking is enabled
L2 Physical Address Range is 4096M
Maximum cache mask is 2000
L2 Cache Mask is 0
read_l2(2) = 0
write_l2(2) = 0
Enable Cache
L2 Cache size is 128K
L2 Cache lines initialized
Disable Cache
Enable Cache
done.
Disabling local apic...done.
CPU #0 Initialized
Allocating PCI resources...COMPUTE_ALLOCATE: do IO
compute_allocate_io: base 0x1000
compute_allocate_io: base 0x1000
DEVIO: Bus 0x1, devfn 0x0, reg 0x2: iosize 0x80
-->set base to 0x1000
BUS 1: set iolimit to 0x1fff
BUSIO: done Bridge Bus 0x1, iobase now 0x2000
DEVIO: Bus 0x0, devfn 0xc, reg 0x0: iosize 0x100
-->set base to 0x2000
DEVIO: Bus 0x0, devfn 0x58, reg 0x0: iosize 0x100
-->set base to 0x2100
BUS 0: set iolimit to 0x2fff
COMPUTE_ALLOCATE: do MEM
compute_allocate_mem: base 0x80000000
compute_allocate_mem: base 0x80000000
DEVMEM: Bus 0x1, devfn 0x0, reg 0x1: memsize 0x20000
-->set base to 0x80000000
BUS 1: set memlimit to 0x800fffff
BUSMEM: Bridge Bus 0x1,membase now 0x80100000
DEVMEM: Bus 0x0, devfn 0x0, reg 0x0: memsize 0x8000000
-->set base to 0x88000000
DEVMEM: Bus 0x0, devfn 0xc, reg 0x1: memsize 0x1000
-->set base to 0x90000000
DEVMEM: Bus 0x0, devfn 0x58, reg 0x1: memsize 0x1000
-->set base to 0x90001000
BUS 0: set memlimit to 0x900fffff
COMPUTE_ALLOCATE: do PREFMEM
Compute_allocate_prefmem: base 0x90100000
Compute_allocate_prefmem: base 0x90100000
DEVPREFMEM: Bus 0x1, devfn 0x0, reg 0x0: prefmemsize 0x8000000
-->set base to 0x98000000
BUS 1: set prefmemlimit to 0x9fffffff
BUSPREFMEM: Bridge Bus 0x1, prefmem base now 0xa0000000
BUS 0: set prefmemlimit to 0x9fffffff
ASSIGN RESOURCES, bus 0
Bus 0x0 iobase to 0x1000 iolimit 0x1fff
Bus 0x0 membase to 0x80000000 memlimit 0x800fffff
Bus 0x0 prefmembase to 0x90100000 prefmemlimit 0x9fffffff
Bus 0x0 devfn 0x0 reg 0x0 base to 0x88000000
Bus 0x0 devfn 0xc reg 0x0 base to 0x2001
Bus 0x0 devfn 0xc reg 0x1 base to 0x90000000
Bus 0x0 devfn 0x58 reg 0x0 base to 0x2101
Bus 0x0 devfn 0x58 reg 0x1 base to 0x90001000
Bus 0x1 devfn 0x0 reg 0x0 base to 0x98000000
Bus 0x1 devfn 0x0 reg 0x1 base to 0x80000000
Bus 0x1 devfn 0x0 reg 0x2 base to 0x1001
done.
Enabling PCI resourcess...DEV Set command bus 0x00 devfn 0x00 to 0x07
DEV Set command bus 0x00 devfn 0x01 to 0x00
DEV Set command bus 0x00 devfn 0x08 to 0x0c
DEV Set command bus 0x00 devfn 0x0c to 0x03
DEV Set command bus 0x00 devfn 0x10 to 0x27
DEV Set command bus 0x00 devfn 0x58 to 0x07
DEV Set command bus 0x01 devfn 0x00 to 0x03
done.
Enabled in SIS 503 regs 0x40 and 0x45
Now try to turn off shadow
device for SiS 630 is 0x5ca8
Shadow memory disabled in SiS 630
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 1, Superio SiS 950
handle_superio port 0x2e, defaultport 0x2e
handle_superio Using port 0x2e
handle_superio done
Zeroing PCI IRQ settings...done.
Copying IRQ routing tables...done.
Winfast 6300 (and similar)...acpibase was 0x5000
acpibase is 0xc000
acpi enable reg was 0x33
acpi enable reg after set is 0xb3
acpi status: word at 0x56 is 0x0
acpi status: byte at 0x4b is 0x0
acpibase + 0x56 is 0x40
acpi disable reg after set is 0x33
Entering the initregs process
Southbridge fixup done for SIS 503
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 2, Superio SiS 950
handle_superio port 0x2e, defaultport 0x2e
handle_superio Using port 0x2e
Call finishup
handle_superio done
Jumping to linuxbiosmain()...
Welcome to elfboot, the open sourced starter.
Febuary 2001, Eric Biederman.
Version 0.99
83:fill_inbuf() - ram buffer:0x00005f8c
123:fill_inbuf() - nvram:0x00010000 block_count:0
Clearing Section: addr: 0x0000000000097ee8 memsz: 0x0000000000003d54
Loading Section: addr: 0x0000000000094000 memsz: 0x0000000000007c3c filesz:
0x0000000000003ee8
Jumping to boot code
ROM segment 0x66a5 length 0x414a reloc 0x9400
clocks_per_tick = 230494
Etherboot 5.0.4 (GPL) ELF (Multiboot) for [SIS900]
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
.....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel .........0
LinuxBIOS starting...
Ram Initialize?
before mainLinuxBIOS booting...
Finding PCI configuration type.
PCI: Using configuration type 1
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 0, Superio SiS 950
handle_superio port 0x0, defaultport 0x2e
handle_superio Using port 0x2e
handle_superio done
Scanning PCI bus...PCI: pci_scan_bus for bus 0
pci_get_sizedev_fn 0x0, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:00 [1039/0630]
pci_get_sizedev_fn 0x1, register 0, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 1, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 2, read-only SO, ignoring it
addr was 0xfffffff9, size was 0xfffffff9
pci_get_sizedev_fn 0x1, register 3, read-only SO, ignoring it
addr was 0xfffffffd, size was 0xfffffffd
pci_get_sizedev_fn 0x1, register 4, read-only SO, ignoring it
addr was 0xfffffff1, size was 0xfffffff1
pci_get_sizedev_fn 0x1, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:01 [1039/5513]
pci_get_sizedev_fn 0x8, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:08 [1039/0008]
pci_get_sizedev_fn 0xc, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:0c [1039/7018]
pci_get_sizedev_fn 0x10, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x10, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:10 [1039/0001]
pci_get_sizedev_fn 0x58, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:58 [1039/0900]
PCI: pci_scan_bus for bus 1
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 01:00 [1039/6300]
PCI: pci_scan_bus returning with max=01
PCI: pci_scan_bus returning with max=01
done
totalram: 56M
Initializing CPU #0
Updating microcode
microcode_info: sig = 0x00000665 pf=0x00000010 rev = 0x00000000
Enabling cache...
Setting variable MTRR 0, base: 0MB, range: 64MB, type: WB
Setting variable MTRR 1, base: 56MB, range: 8MB, type: UC
done.
Max cpuid index : 2
Vendor ID : GenuineIntel
Processor Type : 0x00
Processor Family : 0x06
Processor Model : 0x06
Processor Mask : 0x00
Processor Stepping : 0x05
Feature flags : 0x0183fbff
Cache/TLB descriptor values: 1 reads required
Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries
Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries
Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x40 : No L2 cache
Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size
Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries
Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Configuring L2 cache...Disable Cache
rdmsr(0x17) = 0, 14b00000
L2 Cache latency is 5
Sending 0 to set_l2_register4
L2 ECC Checking is enabled
L2 Physical Address Range is 4096M
Maximum cache mask is 2000
L2 Cache Mask is 0
read_l2(2) = 0
write_l2(2) = 0
Enable Cache
L2 Cache size is 128K
L2 Cache lines initialized
Disable Cache
Enable Cache
done.
Disabling local apic...done.
CPU #0 Initialized
Allocating PCI resources...COMPUTE_ALLOCATE: do IO
compute_allocate_io: base 0x1000
compute_allocate_io: base 0x1000
DEVIO: Bus 0x1, devfn 0x0, reg 0x2: iosize 0x80
-->set base to 0x1000
BUS 1: set iolimit to 0x1fff
BUSIO: done Bridge Bus 0x1, iobase now 0x2000
DEVIO: Bus 0x0, devfn 0xc, reg 0x0: iosize 0x100
-->set base to 0x2000
DEVIO: Bus 0x0, devfn 0x58, reg 0x0: iosize 0x100
-->set base to 0x2100
BUS 0: set iolimit to 0x2fff
COMPUTE_ALLOCATE: do MEM
compute_allocate_mem: base 0x80000000
compute_allocate_mem: base 0x80000000
DEVMEM: Bus 0x1, devfn 0x0, reg 0x1: memsize 0x20000
-->set base to 0x80000000
BUS 1: set memlimit to 0x800fffff
BUSMEM: Bridge Bus 0x1,membase now 0x80100000
DEVMEM: Bus 0x0, devfn 0x0, reg 0x0: memsize 0x8000000
-->set base to 0x88000000
DEVMEM: Bus 0x0, devfn 0xc, reg 0x1: memsize 0x1000
-->set base to 0x90000000
DEVMEM: Bus 0x0, devfn 0x58, reg 0x1: memsize 0x1000
-->set base to 0x90001000
BUS 0: set memlimit to 0x900fffff
COMPUTE_ALLOCATE: do PREFMEM
Compute_allocate_prefmem: base 0x90100000
Compute_allocate_prefmem: base 0x90100000
DEVPREFMEM: Bus 0x1, devfn 0x0, reg 0x0: prefmemsize 0x8000000
-->set base to 0x98000000
BUS 1: set prefmemlimit to 0x9fffffff
BUSPREFMEM: Bridge Bus 0x1, prefmem base now 0xa0000000
BUS 0: set prefmemlimit to 0x9fffffff
ASSIGN RESOURCES, bus 0
Bus 0x0 iobase to 0x1000 iolimit 0x1fff
Bus 0x0 membase to 0x80000000 memlimit 0x800fffff
Bus 0x0 prefmembase to 0x90100000 prefmemlimit 0x9fffffff
Bus 0x0 devfn 0x0 reg 0x0 base to 0x88000000
Bus 0x0 devfn 0xc reg 0x0 base to 0x2001
Bus 0x0 devfn 0xc reg 0x1 base to 0x90000000
Bus 0x0 devfn 0x58 reg 0x0 base to 0x2101
Bus 0x0 devfn 0x58 reg 0x1 base to 0x90001000
Bus 0x1 devfn 0x0 reg 0x0 base to 0x98000000
Bus 0x1 devfn 0x0 reg 0x1 base to 0x80000000
Bus 0x1 devfn 0x0 reg 0x2 base to 0x1001
done.
Enabling PCI resourcess...DEV Set command bus 0x00 devfn 0x00 to 0x07
DEV Set command bus 0x00 devfn 0x01 to 0x00
DEV Set command bus 0x00 devfn 0x08 to 0x0c
DEV Set command bus 0x00 devfn 0x0c to 0x03
DEV Set command bus 0x00 devfn 0x10 to 0x27
DEV Set command bus 0x00 devfn 0x58 to 0x03
DEV Set command bus 0x01 devfn 0x00 to 0x03
done.
Enabled in SIS 503 regs 0x40 and 0x45
Now try to turn off shadow
device for SiS 630 is 0x5ca8
Shadow memory disabled in SiS 630
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 1, Superio SiS 950
handle_superio port 0x2e, defaultport 0x2e
handle_superio Using port 0x2e
handle_superio done
Zeroing PCI IRQ settings...done.
Copying IRQ routing tables...done.
Winfast 6300 (and similar)...acpibase was 0x5000
acpibase is 0xc000
acpi enable reg was 0x33
acpi enable reg after set is 0xb3
acpi status: word at 0x56 is 0x0
acpi status: byte at 0x4b is 0x0
acpibase + 0x56 is 0x40
acpi disable reg after set is 0x33
Entering the initregs process
Southbridge fixup done for SIS 503
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 2, Superio SiS 950
handle_superio port 0x2e, defaultport 0x2e
handle_superio Using port 0x2e
Call finishup
handle_superio done
Jumping to linuxbiosmain()...
Welcome to elfboot, the open sourced starter.
Febuary 2001, Eric Biederman.
Version 0.99
83:fill_inbuf() - ram buffer:0x00005f8c
123:fill_inbuf() - nvram:0x00010000 block_count:0
Clearing Section: addr: 0x0000000000097ee8 memsz: 0x0000000000003d54
Loading Section: addr: 0x0000000000094000 memsz: 0x0000000000007c3c filesz:
0x0000000000003ee8
Jumping to boot code
ROM segment 0x66a5 length 0x414a reloc 0x9400
clocks_per_tick = 230494
Etherboot 5.0.4 (GPL) ELF (Multiboot) for [SIS900]
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
.......Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel .....................Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
.....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel .....................Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ......0
LinuxBIOS starting...
Ram Initialize?
before mainLinuxBIOS booting...
Finding PCI configuration type.
PCI: Using configuration type 1
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 0, Superio SiS 950
handle_superio port 0x0, defaultport 0x2e
handle_superio Using port 0x2e
handle_superio done
Scanning PCI bus...PCI: pci_scan_bus for bus 0
pci_get_sizedev_fn 0x0, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:00 [1039/0630]
pci_get_sizedev_fn 0x1, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:01 [1039/5513]
pci_get_sizedev_fn 0x8, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x8, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:08 [1039/0008]
pci_get_sizedev_fn 0xc, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0xc, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:0c [1039/7018]
pci_get_sizedev_fn 0x10, register 0, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x10, register 1, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:10 [1039/0001]
pci_get_sizedev_fn 0x58, register 2, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x58, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 00:58 [1039/0900]
PCI: pci_scan_bus for bus 1
pci_get_sizedev_fn 0x0, register 3, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 4, read-only SO, ignoring it
addr was 0x0, size was 0x0
pci_get_sizedev_fn 0x0, register 5, read-only SO, ignoring it
addr was 0x0, size was 0x0
PCI: 01:00 [1039/6300]
PCI: pci_scan_bus returning with max=01
PCI: pci_scan_bus returning with max=01
done
totalram: 56M
Initializing CPU #0
Updating microcode
microcode_info: sig = 0x00000665 pf=0x00000010 rev = 0x00000000
Enabling cache...
Setting variable MTRR 0, base: 0MB, range: 64MB, type: WB
Setting variable MTRR 1, base: 56MB, range: 8MB, type: UC
done.
Max cpuid index : 2
Vendor ID : GenuineIntel
Processor Type : 0x00
Processor Family : 0x06
Processor Model : 0x06
Processor Mask : 0x00
Processor Stepping : 0x05
Feature flags : 0x0183fbff
Cache/TLB descriptor values: 1 reads required
Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries
Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries
Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x00 : null
Desc 0x40 : No L2 cache
Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size
Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries
Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Configuring L2 cache...Disable Cache
rdmsr(0x17) = 0, 14b00000
L2 Cache latency is 5
Sending 0 to set_l2_register4
L2 ECC Checking is enabled
L2 Physical Address Range is 4096M
Maximum cache mask is 2000
L2 Cache Mask is 0
read_l2(2) = 0
write_l2(2) = 0
Enable Cache
L2 Cache size is 128K
L2 Cache lines initialized
Disable Cache
Enable Cache
done.
Disabling local apic...done.
CPU #0 Initialized
Allocating PCI resources...COMPUTE_ALLOCATE: do IO
compute_allocate_io: base 0x1000
compute_allocate_io: base 0x1000
DEVIO: Bus 0x1, devfn 0x0, reg 0x2: iosize 0x80
-->set base to 0x1000
BUS 1: set iolimit to 0x1fff
BUSIO: done Bridge Bus 0x1, iobase now 0x2000
DEVIO: Bus 0x0, devfn 0x1, reg 0x0: iosize 0x8
-->set base to 0x2000
DEVIO: Bus 0x0, devfn 0x1, reg 0x1: iosize 0x4
-->set base to 0x2010
DEVIO: Bus 0x0, devfn 0x1, reg 0x2: iosize 0x8
-->set base to 0x2020
DEVIO: Bus 0x0, devfn 0x1, reg 0x3: iosize 0x4
-->set base to 0x2030
DEVIO: Bus 0x0, devfn 0x1, reg 0x4: iosize 0x10
-->set base to 0x2040
DEVIO: Bus 0x0, devfn 0xc, reg 0x0: iosize 0x100
-->set base to 0x2050
DEVIO: Bus 0x0, devfn 0x58, reg 0x0: iosize 0x100
-->set base to 0x2150
BUS 0: set iolimit to 0x2fff
COMPUTE_ALLOCATE: do MEM
compute_allocate_mem: base 0x80000000
compute_allocate_mem: base 0x80000000
DEVMEM: Bus 0x1, devfn 0x0, reg 0x1: memsize 0x20000
-->set base to 0x80000000
BUS 1: set memlimit to 0x800fffff
BUSMEM: Bridge Bus 0x1,membase now 0x80100000
DEVMEM: Bus 0x0, devfn 0x0, reg 0x0: memsize 0x8000000
-->set base to 0x88000000
DEVMEM: Bus 0x0, devfn 0xc, reg 0x1: memsize 0x1000
-->set base to 0x90000000
DEVMEM: Bus 0x0, devfn 0x58, reg 0x1: memsize 0x1000
-->set base to 0x90001000
BUS 0: set memlimit to 0x900fffff
COMPUTE_ALLOCATE: do PREFMEM
Compute_allocate_prefmem: base 0x90100000
Compute_allocate_prefmem: base 0x90100000
DEVPREFMEM: Bus 0x1, devfn 0x0, reg 0x0: prefmemsize 0x8000000
-->set base to 0x98000000
BUS 1: set prefmemlimit to 0x9fffffff
BUSPREFMEM: Bridge Bus 0x1, prefmem base now 0xa0000000
BUS 0: set prefmemlimit to 0x9fffffff
ASSIGN RESOURCES, bus 0
Bus 0x0 iobase to 0x1000 iolimit 0x1fff
Bus 0x0 membase to 0x80000000 memlimit 0x800fffff
Bus 0x0 prefmembase to 0x90100000 prefmemlimit 0x9fffffff
Bus 0x0 devfn 0x0 reg 0x0 base to 0x88000000
Bus 0x0 devfn 0x1 reg 0x0 base to 0x2001
Bus 0x0 devfn 0x1 reg 0x1 base to 0x2011
Bus 0x0 devfn 0x1 reg 0x2 base to 0x2021
Bus 0x0 devfn 0x1 reg 0x3 base to 0x2031
Bus 0x0 devfn 0x1 reg 0x4 base to 0x2041
Bus 0x0 devfn 0xc reg 0x0 base to 0x2051
Bus 0x0 devfn 0xc reg 0x1 base to 0x90000000
Bus 0x0 devfn 0x58 reg 0x0 base to 0x2151
Bus 0x0 devfn 0x58 reg 0x1 base to 0x90001000
Bus 0x1 devfn 0x0 reg 0x0 base to 0x98000000
Bus 0x1 devfn 0x0 reg 0x1 base to 0x80000000
Bus 0x1 devfn 0x0 reg 0x2 base to 0x1001
done.
Enabling PCI resourcess...DEV Set command bus 0x00 devfn 0x00 to 0x07
DEV Set command bus 0x00 devfn 0x01 to 0x01
DEV Set command bus 0x00 devfn 0x08 to 0x0c
DEV Set command bus 0x00 devfn 0x0c to 0x03
DEV Set command bus 0x00 devfn 0x10 to 0x27
DEV Set command bus 0x00 devfn 0x58 to 0x03
DEV Set command bus 0x01 devfn 0x00 to 0x03
done.
Enabled in SIS 503 regs 0x40 and 0x45
Now try to turn off shadow
device for SiS 630 is 0x5ca8
Shadow memory disabled in SiS 630
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 1, Superio SiS 950
handle_superio port 0x2e, defaultport 0x2e
handle_superio Using port 0x2e
handle_superio done
Zeroing PCI IRQ settings...done.
Copying IRQ routing tables...done.
Winfast 6300 (and similar)...acpibase was 0x5000
acpibase is 0xc000
acpi enable reg was 0x33
acpi enable reg after set is 0xb3
acpi status: word at 0x56 is 0x0
acpi status: byte at 0x4b is 0x0
acpibase + 0x56 is 0x40
acpi disable reg after set is 0x33
Entering the initregs process
Southbridge fixup done for SIS 503
handle_superio start, s 000040c0 nsuperio 1 s->super 000058d8
handle_superio: Pass 2, Superio SiS 950
handle_superio port 0x2e, defaultport 0x2e
handle_superio Using port 0x2e
Call finishup
handle_superio done
Jumping to linuxbiosmain()...
Welcome to elfboot, the open sourced starter.
Febuary 2001, Eric Biederman.
Version 0.99
83:fill_inbuf() - ram buffer:0x00005f8c
123:fill_inbuf() - nvram:0x00010000 block_count:0
Clearing Section: addr: 0x0000000000097ee8 memsz: 0x0000000000003d54
Loading Section: addr: 0x0000000000094000 memsz: 0x0000000000007c3c filesz:
0x0000000000003ee8
Jumping to boot code
ROM segment 0x66a5 length 0x414a reloc 0x9400
clocks_per_tick = 230452
Etherboot 5.0.4 (GPL) ELF (Multiboot) for [SIS900]
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
.....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
.....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
.....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
.....Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
......Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
......Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
........Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel .....(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
........Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
.......Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
......Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
........Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel .......(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X0900
sis900_probe: SiS 900 Internal MII PHY transceiver found at address 1.
sis900_probe: Using SiS 900 Internal MII PHY as default
sis900_read_mode: Media Link On 100mbps full-duplex
Searching for server (DHCP)...
......Me: 172.19.209.103, Server: 172.19.209.106, Gateway 172.19.1.254
Loading 172.19.209.106:/tftpboot/kernel ..(ELF)... segment exceeding memory
Unable to load file.
<sleep>
<abort>
sis900_read_mode: Media Link On 100mbps full-duplex
Found SIS900 at 0X2100, ROM address 0X0000
Probing...[SIS900]
sis900_probe: MAC addr 00:C0:CA:17:D8:C2 at ioaddr 0X2100
sis900_probe: Vendor:0X1039 Device:0X
