On Wed, 8 Aug 2007 20:43:25 +0000 (UTC) Hollis Blanchard <[EMAIL PROTECTED]> wrote:
> On Tue, 07 Aug 2007 14:20:50 +1000, David Gibson wrote: > > > > This patch fixes the problem in both arch/ppc and arch/powerpc by > > inhibiting interrupts (even critical and debug interrupts) across the > > relevant instructions. > > How could a critical or debug interrupt modify the contents of MMUCR? Interrupts from UICs can be configured as critical. If one of those triggers, (or any other CE triggers) and causes a tlb miss, you have a race. The watchdog timer interrupt also is a CE IIRC. CE and DE are admittedly a much smaller race, but still possible. Masking EE off is the largest one. josh _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
