On Wed, Oct 03, 2007 at 01:07:58PM +1000, Paul Mackerras wrote: > Olof Johansson writes: > > > > This makes the kernel use 1TB segments for all kernel mappings and for > > > user addresses of 1TB and above, on machines which support them > > > (currently POWER5+ and POWER6). > > > > PA6T supports them as well :) > > In the patch, we don't actually hard-code the CPU_FTR_1T_SEGMENT bit > in the cputable entry for any processor; instead we look in the > ibm,processor-segment-sizes property in the cpu node(s) in the device > tree.
Yep, I see that. I just wanted to clarify it for the (future) commit message. > Do you want us to add the CPU_FTR_1T_SEGMENT bit to the > cputable entry for the PA6T, or will your firmware gives the > ibm,processor-segment-sizes property in the device tree? Thanks, but we've already got the properties there so it just works. > > Wouldn't it be possible to stick with 1TB segments for the low range > > for 64-bit processes as well, and have them allocate their hugepages > > at >1TB? > > You mean, forbid hugepages below 1TB? That would be a user-visible > ABI change. There are linker scripts for generating executables whose > text and/or data can go in hugepages, and I believe they put the > text/data below 1TB. Hm, good point. Bummer. -Olof _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev