> -----Original Message----- > From: Kumar Gala [mailto:[EMAIL PROTECTED] > Sent: Wednesday, October 17, 2007 9:46 PM > To: Li Yang-r58472 > Cc: [EMAIL PROTECTED]; linuxppc-dev@ozlabs.org > Subject: Re: [PATCH v3 2/9] ipic: add new interrupts > introduced by new chip > > > On Oct 12, 2007, at 8:28 AM, Li Yang wrote: > > > These interrupts are introduced by the latest Freescale SoC such as > > MPC837x. The patch also adds comment to interrupts. > > > > Signed-off-by: Li Yang <[EMAIL PROTECTED]> > > --- > > arch/powerpc/sysdev/ipic.c | 224 +++++++++++++++++++++++++++++++++ > > +---------- > > arch/powerpc/sysdev/ipic.h | 7 +- > > include/asm-powerpc/ipic.h | 12 ++- > > 3 files changed, 186 insertions(+), 57 deletions(-) > > > > diff --git a/arch/powerpc/sysdev/ipic.c > b/arch/powerpc/sysdev/ipic.c > > index 05a56e5..cd8590d 100644 > > --- a/arch/powerpc/sysdev/ipic.c > > +++ b/arch/powerpc/sysdev/ipic.c > > @@ -33,7 +33,31 @@ static struct ipic * primary_ipic; static > > DEFINE_SPINLOCK(ipic_lock); > > > > static struct ipic_info ipic_info[] = { > > - [9] = { > > + [1] = { /* PEX1 CNT */ > > Remove the comments, they are not correct for all IPIC users > and thus misleading.
We had discussed about this. The reason why I add these comments is that IPIC register definition in our user manual only reference interrupts by name rather than numbers. It will greatly enhance the readability of the code, so that we can check easily if the current code fits IPIC definition of a specific chip. Without comments the check will be a disaster. :) The comments are correct for all the in tree CPUs. It should be kept up-to-date easily when adding new CPUs. - Leo _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
