On Wed, 2007-11-21 at 16:47 -0700, Grant Likely wrote: > On 11/20/07, Benjamin Herrenschmidt <[EMAIL PROTECTED]> wrote: > > This adds some basic real mode based early udbg support for 40x > > in order to debug things more easily > > > > Signed-off-by: Benjamin Herrenschmidt <[EMAIL PROTECTED]> > > --- > > --- linux-work.orig/arch/powerpc/platforms/Kconfig.cputype 2007-11-21 > > 12:50:16.000000000 +1100 > > +++ linux-work/arch/powerpc/platforms/Kconfig.cputype 2007-11-21 > > 12:50:18.000000000 +1100 > > @@ -43,6 +43,7 @@ config 40x > > bool "AMCC 40x" > > select PPC_DCR_NATIVE > > select WANT_DEVICE_TREE > > + select PPC_UDBG_16550 > > Unfortunately, this isn't always true. The Xilinx Virtex parts us > config 40x, but not all FPGA bitstreams have a 16550 serial port. > Sometimes it's a uartlite instead.
What does uartlite looks like ? Ben. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
