On Thu, 2016-04-14 at 13:39 -0500, Jack Miller wrote:
> > I'm not sure that works on processes before power8. > > > > There DSCR SPR number 0x11 will always trap and emulate from userspace > > (see arch/powerpc/kernel/traps.c:emulate_instruction()). That is not > > controlled by FSCR and should work on POWER7 where FSCR is not > > present. We need to set the inherit bit there too. > > > > DSCR SPR number 0x3 is controlled by fscr, but it's only avaliable on > > POWER8. > > > > > Right now the FSCR switch is conditional on FTR_ARCH_207S which is > > > more exclusive than FTR_DSCR, but I guess the actual FSCR register is > > > universal to PPC64 like the fscr field in the thread struct? If so, I > > > can just move the FSCR save/restore out of the 207 conditional. > > > > FSCR was only introduced in power8, so it needs to be 207 conditional > > > > So on P6/P7 (which have FTR_DSCR) set we're potentially mtspr'ing to a > non-existent register? Yuck. Can at least strip that logic out thanks > to the full context switch, I think, even if dscr_inherit actually has > a use. Yeah, welcome to DSCR... it's horrible. :-( It's not actually non-existent. It's just OS only privileged. Not that that makes much difference, as we still trap and emulate (and set the inherent bit). Mikey _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev