Oliver O'Halloran <ooh...@gmail.com> writes: > diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c > index 5571f30ff72d..5e1811b24415 100644 > --- a/arch/powerpc/kernel/smp.c > +++ b/arch/powerpc/kernel/smp.c > @@ -724,10 +724,17 @@ static void update_cpu_masks(int cpu, bool onlining) > > update_thread_mask(cpu, onlining); > > + /* we need the l2 cache mask for the power9 scheduler topology */ > + if (cpu_has_feature(CPU_FTR_ARCH_300)) > + update_mask_by_l2(cpu, onlining, cpu_cache_mask);
I guess I missed something somewhere, why do we need to check the CPU feature? ... > @@ -829,7 +862,10 @@ void __init smp_cpus_done(unsigned int max_cpus) > > dump_numa_cpu_topology(); > > - set_sched_topology(powerpc_topology); > + if (cpu_has_feature(CPU_FTR_ARCH_300)) > + set_sched_topology(power9_topology); > + else > + set_sched_topology(powerpc_topology); Ideally this would just all come from the device tree. If we detect that the L2 is shared then we tell the scheduler that, we shouldn't need to know that P9 is special. It certainly doesn't say anywhere in ISA 3.00 that the L2 is shared. cheers