This adds emulation for the isel instruction.
Tested for correctness against the isel instruction and its extended
mnemonics (lt, gt, eq) on ppc64le.
Signed-off-by: Matt Brown <matthew.brown....@gmail.com>
---
v2:
- fixed opcode
- fixed definition to include the 'if RA=0, a=0' clause
- fixed ccr bitshifting error
---
arch/powerpc/lib/sstep.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 0bcf631..de3d558 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -1239,6 +1239,17 @@ int analyse_instr(struct instruction_op *op, struct
pt_regs *regs,
/*
* Logical instructions
*/
+ case 15: /* isel */
+ mb = (instr >> 6) & 0x1f; /* bc */
+ val = (regs->ccr >> (31 - mb)) & 1;
+ val2 = (ra) ? regs->gpr[ra] : 0;
+
+ if (val)
+ regs->gpr[rd] = val2;
+ else
+ regs->gpr[rd] = regs->gpr[rb];
+ goto logical_done;
+
case 26: /* cntlzw */
asm("cntlzw %0,%1" : "=r" (regs->gpr[ra]) :
"r" (regs->gpr[rd]));
--
2.9.3
