Power9 introduces a hardware subsystem referred to as the Virtual
Accelerator Switchboard (VAS). VAS allows kernel subsystems and user
space processes to directly access the Nest Accelerator (NX) engines
which implement compression and encryption algorithms in the hardware.
NX has been in Power processors since Power7+, but access to the NX
engines was through the 'icswx' instruction which is only available
to the kernel/hypervisor. Starting with Power9, access to the NX
engines is provided to both kernel and user space processes through
VAS.
The switchboard (i.e VAS) multiplexes accesses between "receivers" and
"senders", where the "receivers" are typically the NX engines and
"senders" are the kernel subsystems and user processors that wish to
access the receivers (NX engines). Once a sender is "connected" to
a receiver through the switchboard, the senders can submit compression/
encryption requests to the hardware using the new (PowerISA 3.0)
"copy" and "paste" instructions.
In the initial OPAL and PowerNV kernel patchsets, the "senders" can
only be kernel subsystems (eg NX-842 driver) and receivers can only
be the NX-842 engine. Follow-on patch sets will allow senders/receivers
to be user-space processes and receivers to be NX-GZIP engines.
Provides:
This kernel patch set configures the VAS subsystems and provides
kernel interfaces to drivers like NX-842 to open receive and send
windows in VAS and to submit compression requests to the NX engine.
Requires:
This patch set needs corresponding VAS/NX skiboot patches which
were merged into skiboot tree. i.e skiboot must include:
commit b503dcf ("vas: Set mmio enable bits in DD2")
Tests:
In-kernel compression requests were tested on DD1 and DD2 POWER9
hardware using compression self-test module and the following
NX-842 patch set from Haren Myneni:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-July/160620.html
Git Tree:
https://github.com/sukadev/linux/
Branch: vas-kern-v7
Thanks to input from Ben Herrenschmidt, Michael Neuling, Michael Ellerman
and Haren Myneni.
Changelog[v7]:
- Drop support for user space send/receive FTW windows (will be
posted separately) Simplifies the rx-win-open interface a bit.
- [Michael Ellerman] Move GET_FIELD/SET_FIELD macros from
uapi/asm/vas.h to asm/vas.h.
Changelog[v6]
- Add support for user space send/receive FTW windows
- Add a new, NX-FTW driver which provides the FTW user interface
Changelog[v5]
- [Ben Herrenschmidt] Make VAS a platform device in the device tree
and use the core platform functions to parse the VAS properties.
Map the VAS MMIO regions as non-cachable and paste regions as
cachable. Use CONFIG_PPC_VAS rather than CONFIG_VAS; Don't assume
VAS ids are sequential.
- Copy the FIFO address as is into LFIFO_BAR (don't shift it).
Changelog[v4]
Comments from Michael Neuling:
- Move VAS code from drivers/misc/vas to arch/powerpc/platforms/powernv
since VAS only provides interfaces to other drivers like NX-842.
- Drop vas-internal.h and use vas.h in separate dirs for VAS
internal, kernel API and user API
- Rather than create 6 separate device tree properties windows
and window context, combine them into 6 "reg" properties.
- Drop vas_window_reset() since windows are reset/cleared before
being assigned to kernel/users.
- Use ilog2() and radix_enabled() helpers
Changelog[v3]
- Rebase to v4.11-rc1
- Add interfaces to initialize send/receive window attributes to
defaults that drivers can use (see arch/powerpc/include/asm/vas.h)
- Modify interface vas_paste() to return 0 or error code
- Fix a bug in setting Translation Control Mode (0b11 not 0x11)
- Enable send-window-credit checking
- Reorg code in vas_win_close()
- Minor reorgs and tweaks to register field settings to make it
easier to add support for user space windows.
- Skip writing to read-only registers
- Start window indexing from 0 rather than 1
Changelog[v2]
- Use vas-id, HVWC, UWC and paste address, entries from device tree
rather than defining/computing them in kernel and reorg code.
Sukadev Bhattiprolu (12):
powerpc/vas: Define macros, register fields and structures
Move GET_FIELD/SET_FIELD to vas.h
powerpc/vas: Define vas_init() and vas_exit()
powerpc/vas: Define helpers to access MMIO regions
powerpc/vas: Define helpers to init window context
powerpc/vas: Define helpers to alloc/free windows
powerpc/vas: Define vas_win_paste_addr()
powerpc/vas: Define vas_win_id()
powerpc/vas: Define vas_rx_win_open() interface
powerpc/vas: Define vas_win_close() interface
powerpc/vas: Define vas_tx_win_open()
powerpc/vas: Define copy/paste interfaces
.../devicetree/bindings/powerpc/ibm,vas.txt | 24 +
MAINTAINERS | 9 +
arch/powerpc/include/asm/vas.h | 174 +++
arch/powerpc/platforms/powernv/Kconfig | 14 +
arch/powerpc/platforms/powernv/Makefile | 1 +
arch/powerpc/platforms/powernv/copy-paste.h | 74 ++
arch/powerpc/platforms/powernv/vas-window.c | 1189 ++++++++++++++++++++
arch/powerpc/platforms/powernv/vas.c | 183 +++
arch/powerpc/platforms/powernv/vas.h | 500 ++++++++
drivers/crypto/nx/nx-842-powernv.c | 7 +-
drivers/crypto/nx/nx-842.h | 5 -
11 files changed, 2172 insertions(+), 8 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/ibm,vas.txt
create mode 100644 arch/powerpc/include/asm/vas.h
create mode 100644 arch/powerpc/platforms/powernv/copy-paste.h
create mode 100644 arch/powerpc/platforms/powernv/vas-window.c
create mode 100644 arch/powerpc/platforms/powernv/vas.c
create mode 100644 arch/powerpc/platforms/powernv/vas.h
--
2.7.4
