On 20/11/2019 12:28, Oliver O'Halloran wrote:
> After resetting a VF we call eeh_restore_vf_config() to restore several
> registers in the VFs config space. For physical functions this is normally
> handled by the pci_reinit_device() OPAL call which requests firmware to
> re-program the device with whatever defaults were set at boot time. We
> can't use that for VFs since OPAL (being firmware) doesn't know (or care)
> about VFs.
>
> However, the fields that are restored here are all marked as reserved for
> VFs in the SR-IOV spec. In other words, eeh_restore_vf_config() doesn't
> actually do anything.
>
> There is an argument to be made that we should be saving and restoring
> some of these fields since they are marked as "Reserved, but Preserve"
> (ResvP) to allow these fields to be used in new versions of the SR-IOV.
> However, the current code doesn't even do that properly since it assumes
> they can be set to whatever the EEH core has assumed to be correct. If
> the fields *are* used in future versions of the SR-IOV spec this code
> is still broken since it doesn't take into account any changes made
> by the driver, or the Linux IOV core.
> Given the above, just delete the code. It's broken, it's mis-leading,
> and it's getting in the way of doing useful cleanups.
There is still a prototype for this in arch/powerpc/include/asm/eeh.h,
and pci_dn::mps as well.
With the history of this explained offline,
Reviewed-by: Alexey Kardashevskiy <a...@ozlabs.ru>
>
> Signed-off-by: Oliver O'Halloran <ooh...@gmail.com>
> ---
> arch/powerpc/kernel/eeh.c | 59 --------------------
> arch/powerpc/platforms/powernv/eeh-powernv.c | 39 +++----------
> arch/powerpc/platforms/pseries/eeh_pseries.c | 26 +--------
> 3 files changed, 8 insertions(+), 116 deletions(-)
>
> diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
> index ae0a9c421d7b..a3b93db972fc 100644
> --- a/arch/powerpc/kernel/eeh.c
> +++ b/arch/powerpc/kernel/eeh.c
> @@ -742,65 +742,6 @@ static void eeh_restore_dev_state(struct eeh_dev *edev,
> void *userdata)
> pci_restore_state(pdev);
> }
>
> -int eeh_restore_vf_config(struct pci_dn *pdn)
> -{
> - struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
> - u32 devctl, cmd, cap2, aer_capctl;
> - int old_mps;
> -
> - if (edev->pcie_cap) {
> - /* Restore MPS */
> - old_mps = (ffs(pdn->mps) - 8) << 5;
> - eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
> - 2, &devctl);
> - devctl &= ~PCI_EXP_DEVCTL_PAYLOAD;
> - devctl |= old_mps;
> - eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
> - 2, devctl);
> -
> - /* Disable Completion Timeout if possible */
> - eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP2,
> - 4, &cap2);
> - if (cap2 & PCI_EXP_DEVCAP2_COMP_TMOUT_DIS) {
> - eeh_ops->read_config(pdn,
> - edev->pcie_cap + PCI_EXP_DEVCTL2,
> - 4, &cap2);
> - cap2 |= PCI_EXP_DEVCTL2_COMP_TMOUT_DIS;
> - eeh_ops->write_config(pdn,
> - edev->pcie_cap + PCI_EXP_DEVCTL2,
> - 4, cap2);
> - }
> - }
> -
> - /* Enable SERR and parity checking */
> - eeh_ops->read_config(pdn, PCI_COMMAND, 2, &cmd);
> - cmd |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
> - eeh_ops->write_config(pdn, PCI_COMMAND, 2, cmd);
> -
> - /* Enable report various errors */
> - if (edev->pcie_cap) {
> - eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
> - 2, &devctl);
> - devctl &= ~PCI_EXP_DEVCTL_CERE;
> - devctl |= (PCI_EXP_DEVCTL_NFERE |
> - PCI_EXP_DEVCTL_FERE |
> - PCI_EXP_DEVCTL_URRE);
> - eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
> - 2, devctl);
> - }
> -
> - /* Enable ECRC generation and check */
> - if (edev->pcie_cap && edev->aer_cap) {
> - eeh_ops->read_config(pdn, edev->aer_cap + PCI_ERR_CAP,
> - 4, &aer_capctl);
> - aer_capctl |= (PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE);
> - eeh_ops->write_config(pdn, edev->aer_cap + PCI_ERR_CAP,
> - 4, aer_capctl);
> - }
> -
> - return 0;
> -}
> -
> /**
> * pcibios_set_pcie_reset_state - Set PCI-E reset state
> * @dev: pci device struct
> diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c
> b/arch/powerpc/platforms/powernv/eeh-powernv.c
> index ef727ecd99cd..b2ac4130fda7 100644
> --- a/arch/powerpc/platforms/powernv/eeh-powernv.c
> +++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
> @@ -1649,20 +1649,13 @@ static int pnv_eeh_restore_config(struct pci_dn *pdn)
> if (!edev)
> return -EEXIST;
>
> - /*
> - * We have to restore the PCI config space after reset since the
> - * firmware can't see SRIOV VFs.
> - *
> - * FIXME: The MPS, error routing rules, timeout setting are worthy
> - * to be exported by firmware in extendible way.
> - */
> - if (edev->physfn) {
> - ret = eeh_restore_vf_config(pdn);
> - } else {
> - phb = pdn->phb->private_data;
> - ret = opal_pci_reinit(phb->opal_id,
> - OPAL_REINIT_PCI_DEV, config_addr);
> - }
> + /* Nothing to do for VFs */
> + if (edev->physfn)
> + return 0;
> +
> + phb = pdn->phb->private_data;
> + ret = opal_pci_reinit(phb->opal_id,
> + OPAL_REINIT_PCI_DEV, config_addr);
>
> if (ret) {
> pr_warn("%s: Can't reinit PCI dev 0x%x (%lld)\n",
> @@ -1691,24 +1684,6 @@ static struct eeh_ops pnv_eeh_ops = {
> .notify_resume = NULL
> };
>
> -#ifdef CONFIG_PCI_IOV
> -static void pnv_pci_fixup_vf_mps(struct pci_dev *pdev)
> -{
> - struct pci_dn *pdn = pci_get_pdn(pdev);
> - int parent_mps;
> -
> - if (!pdev->is_virtfn)
> - return;
> -
> - /* Synchronize MPS for VF and PF */
> - parent_mps = pcie_get_mps(pdev->physfn);
> - if ((128 << pdev->pcie_mpss) >= parent_mps)
> - pcie_set_mps(pdev, parent_mps);
> - pdn->mps = pcie_get_mps(pdev);
> -}
> -DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pnv_pci_fixup_vf_mps);
> -#endif /* CONFIG_PCI_IOV */
> -
> /**
> * eeh_powernv_init - Register platform dependent EEH operations
> *
> diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c
> b/arch/powerpc/platforms/pseries/eeh_pseries.c
> index 95bbf9102584..fa704d7052ec 100644
> --- a/arch/powerpc/platforms/pseries/eeh_pseries.c
> +++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
> @@ -657,30 +657,6 @@ static int pseries_eeh_write_config(struct pci_dn *pdn,
> int where, int size, u32
> return rtas_write_config(pdn, where, size, val);
> }
>
> -static int pseries_eeh_restore_config(struct pci_dn *pdn)
> -{
> - struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
> - s64 ret = 0;
> -
> - if (!edev)
> - return -EEXIST;
> -
> - /*
> - * FIXME: The MPS, error routing rules, timeout setting are worthy
> - * to be exported by firmware in extendible way.
> - */
> - if (edev->physfn)
> - ret = eeh_restore_vf_config(pdn);
> -
> - if (ret) {
> - pr_warn("%s: Can't reinit PCI dev 0x%x (%lld)\n",
> - __func__, edev->pe_config_addr, ret);
> - return -EIO;
> - }
> -
> - return ret;
> -}
> -
> #ifdef CONFIG_PCI_IOV
> int pseries_send_allow_unfreeze(struct pci_dn *pdn,
> u16 *vf_pe_array, int cur_vfs)
> @@ -786,7 +762,7 @@ static struct eeh_ops pseries_eeh_ops = {
> .read_config = pseries_eeh_read_config,
> .write_config = pseries_eeh_write_config,
> .next_error = NULL,
> - .restore_config = pseries_eeh_restore_config,
> + .restore_config = NULL,
> #ifdef CONFIG_PCI_IOV
> .notify_resume = pseries_notify_resume
> #endif
>
--
Alexey
