On 4/2/20 5:43 PM, Frederic Barrat wrote: > We now allocate interrupts through xive directly. > > Signed-off-by: Frederic Barrat <fbar...@linux.ibm.com>
Reviewed-by: Cédric Le Goater <c...@kaod.org> > --- > arch/powerpc/include/asm/pnv-ocxl.h | 3 --- > arch/powerpc/platforms/powernv/ocxl.c | 30 --------------------------- > 2 files changed, 33 deletions(-) > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h > b/arch/powerpc/include/asm/pnv-ocxl.h > index 7de82647e761..e90650328c9c 100644 > --- a/arch/powerpc/include/asm/pnv-ocxl.h > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > @@ -30,7 +30,4 @@ extern int pnv_ocxl_spa_setup(struct pci_dev *dev, void > *spa_mem, int PE_mask, > extern void pnv_ocxl_spa_release(void *platform_data); > extern int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int > pe_handle); > > -extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); > -extern void pnv_ocxl_free_xive_irq(u32 irq); > - > #endif /* _ASM_PNV_OCXL_H */ > diff --git a/arch/powerpc/platforms/powernv/ocxl.c > b/arch/powerpc/platforms/powernv/ocxl.c > index 8c65aacda9c8..ecdad219d704 100644 > --- a/arch/powerpc/platforms/powernv/ocxl.c > +++ b/arch/powerpc/platforms/powernv/ocxl.c > @@ -2,7 +2,6 @@ > // Copyright 2017 IBM Corp. > #include <asm/pnv-ocxl.h> > #include <asm/opal.h> > -#include <asm/xive.h> > #include <misc/ocxl-config.h> > #include "pci.h" > > @@ -484,32 +483,3 @@ int pnv_ocxl_spa_remove_pe_from_cache(void > *platform_data, int pe_handle) > return rc; > } > EXPORT_SYMBOL_GPL(pnv_ocxl_spa_remove_pe_from_cache); > - > -int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr) > -{ > - __be64 flags, trigger_page; > - s64 rc; > - u32 hwirq; > - > - hwirq = xive_native_alloc_irq(); > - if (!hwirq) > - return -ENOENT; > - > - rc = opal_xive_get_irq_info(hwirq, &flags, NULL, &trigger_page, NULL, > - NULL); > - if (rc || !trigger_page) { > - xive_native_free_irq(hwirq); > - return -ENOENT; > - } > - *irq = hwirq; > - *trigger_addr = be64_to_cpu(trigger_page); > - return 0; > - > -} > -EXPORT_SYMBOL_GPL(pnv_ocxl_alloc_xive_irq); > - > -void pnv_ocxl_free_xive_irq(u32 irq) > -{ > - xive_native_free_irq(irq); > -} > -EXPORT_SYMBOL_GPL(pnv_ocxl_free_xive_irq); >