Nicholas Piggin <npig...@gmail.com> writes:

> This option increases the number of hash misses by limiting the number of
> kernel HPT entries. This helps stress test difficult to hit paths in the
> kernel.
>

It would nice if we can explain in commit message how we are limiting
the number of HPT entries.

> Signed-off-by: Nicholas Piggin <npig...@gmail.com>
> ---
>  .../admin-guide/kernel-parameters.txt         |  9 +++
>  arch/powerpc/include/asm/book3s/64/mmu-hash.h | 10 +++
>  arch/powerpc/mm/book3s64/hash_4k.c            |  3 +
>  arch/powerpc/mm/book3s64/hash_64k.c           |  8 +++
>  arch/powerpc/mm/book3s64/hash_utils.c         | 66 ++++++++++++++++++-
>  5 files changed, 95 insertions(+), 1 deletion(-)

....

  
> +void hpt_do_torture(unsigned long ea, unsigned long access,
> +                 unsigned long rflags, unsigned long hpte_group)
> +{
> +     unsigned long last_group;
> +     int cpu = raw_smp_processor_id();
> +
> +     last_group = torture_hpt_last_group[cpu];
> +     if (last_group != -1UL) {
> +             while (mmu_hash_ops.hpte_remove(last_group) != -1)
> +                     ;
> +             torture_hpt_last_group[cpu] = -1UL;
> +     }
> +
> +#define QEMU_WORKAROUND      0
> +
> +     if (ea >= PAGE_OFFSET) {
> +             if (!QEMU_WORKAROUND && (access & (_PAGE_READ|_PAGE_WRITE)) &&
> +                 !(rflags & (HPTE_R_I|HPTE_R_G))) {
> +                     /* prefetch / prefetchw does not seem to set up a TLB
> +                      * entry with the powerpc systemsim (mambo) emulator,
> +                      * though it works with real hardware. An alternative
> +                      * approach that would work more reliably on quirky
> +                      * emulators like QEMU may be to remember the last
> +                      * insertion and remove that, rather than removing the
> +                      * current insertion. Then no prefetch is required.
> +                      */
> +                     if ((access & _PAGE_WRITE) && (access & _PAGE_READ))
> +                             atomic_add(0, (atomic_t *)(ea & ~0x3));
> +                     else if (access & _PAGE_READ)
> +                             *(volatile char *)ea;
> +
> +                     mb();
> +
> +                     while (mmu_hash_ops.hpte_remove(hpte_group) != -1)
> +                             ;

Do we get similar hpte faults rate, if we remove everything except the
current inserted entry?. If so that would largely simplify the code.

> +             } else {
> +                     /* Can't prefetch cache-inhibited so clear next time. */
> +                     torture_hpt_last_group[cpu] = hpte_group;
> +             }
> +     }
> +}
> +
> +
>  #ifdef CONFIG_DEBUG_PAGEALLOC
>  static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi)
>  {
> -- 
> 2.23.0

-aneesh

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