Reduce maintenance burden of DVSEC query implementation by using the
centralized PCI core implementation.

Cc: io...@lists.linux-foundation.org
Cc: David Woodhouse <dw...@infradead.org>
Cc: Lu Baolu <baolu...@linux.intel.com>
Signed-off-by: Ben Widawsky <ben.widaw...@intel.com>
---
 drivers/iommu/intel/iommu.c | 15 +--------------
 1 file changed, 1 insertion(+), 14 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index d75f59ae28e6..30c97181f0ae 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -5398,20 +5398,7 @@ static int intel_iommu_disable_sva(struct device *dev)
  */
 static int siov_find_pci_dvsec(struct pci_dev *pdev)
 {
-       int pos;
-       u16 vendor, id;
-
-       pos = pci_find_next_ext_capability(pdev, 0, 0x23);
-       while (pos) {
-               pci_read_config_word(pdev, pos + 4, &vendor);
-               pci_read_config_word(pdev, pos + 8, &id);
-               if (vendor == PCI_VENDOR_ID_INTEL && id == 5)
-                       return pos;
-
-               pos = pci_find_next_ext_capability(pdev, pos, 0x23);
-       }
-
-       return 0;
+       return pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_INTEL, 5);
 }
 
 static bool
-- 
2.33.0

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