This adds two atomic opcodes BPF_XCHG and BPF_CMPXCHG on ppc64, both
of which include the BPF_FETCH flag.  The kernel's atomic_cmpxchg
operation fundamentally has 3 operands, but we only have two register
fields. Therefore the operand we compare against (the kernel's API
calls it 'old') is hard-coded to be BPF_REG_R0. Also, kernel's
atomic_cmpxchg returns the previous value at dst_reg + off. JIT the
same for BPF too with return value put in BPF_REG_0.

  BPF_REG_R0 = atomic_cmpxchg(dst_reg + off, BPF_REG_R0, src_reg);

Signed-off-by: Hari Bathini <hbath...@linux.ibm.com>
---
 arch/powerpc/net/bpf_jit_comp64.c | 28 ++++++++++++++++++++++++----
 1 file changed, 24 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/net/bpf_jit_comp64.c 
b/arch/powerpc/net/bpf_jit_comp64.c
index 504fa459f9f3..df9e20b22ccb 100644
--- a/arch/powerpc/net/bpf_jit_comp64.c
+++ b/arch/powerpc/net/bpf_jit_comp64.c
@@ -783,6 +783,9 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, 
struct codegen_context *
                 */
                case BPF_STX | BPF_ATOMIC | BPF_W:
                case BPF_STX | BPF_ATOMIC | BPF_DW:
+                       u32 save_reg = tmp2_reg;
+                       u32 ret_reg = src_reg;
+
                        /* Get offset into TMP_REG_1 */
                        EMIT(PPC_RAW_LI(tmp1_reg, off));
                        tmp_idx = ctx->idx * 4;
@@ -813,6 +816,24 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, 
struct codegen_context *
                        case BPF_XOR | BPF_FETCH:
                                EMIT(PPC_RAW_XOR(tmp2_reg, tmp2_reg, src_reg));
                                break;
+                       case BPF_CMPXCHG:
+                               /*
+                                * Return old value in BPF_REG_0 for 
BPF_CMPXCHG &
+                                * in src_reg for other cases.
+                                */
+                               ret_reg = bpf_to_ppc(BPF_REG_0);
+
+                               /* Compare with old value in BPF_R0 */
+                               if (size == BPF_DW)
+                                       
EMIT(PPC_RAW_CMPD(bpf_to_ppc(BPF_REG_0), tmp2_reg));
+                               else
+                                       
EMIT(PPC_RAW_CMPW(bpf_to_ppc(BPF_REG_0), tmp2_reg));
+                               /* Don't set if different from old value */
+                               PPC_BCC_SHORT(COND_NE, (ctx->idx + 3) * 4);
+                               fallthrough;
+                       case BPF_XCHG:
+                               save_reg = src_reg;
+                               break;
                        default:
                                pr_err_ratelimited(
                                        "eBPF filter atomic op code %02x (@%d) 
unsupported\n",
@@ -822,15 +843,14 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, 
struct codegen_context *
 
                        /* store new value */
                        if (size == BPF_DW)
-                               EMIT(PPC_RAW_STDCX(tmp2_reg, tmp1_reg, 
dst_reg));
+                               EMIT(PPC_RAW_STDCX(save_reg, tmp1_reg, 
dst_reg));
                        else
-                               EMIT(PPC_RAW_STWCX(tmp2_reg, tmp1_reg, 
dst_reg));
+                               EMIT(PPC_RAW_STWCX(save_reg, tmp1_reg, 
dst_reg));
                        /* we're done if this succeeded */
                        PPC_BCC_SHORT(COND_NE, tmp_idx);
 
-                       /* For the BPF_FETCH variant, get old value into 
src_reg */
                        if (imm & BPF_FETCH)
-                               EMIT(PPC_RAW_MR(src_reg, _R0));
+                               EMIT(PPC_RAW_MR(ret_reg, _R0));
                        break;
 
                /*
-- 
2.35.1

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