On Thu, Jan 8, 2026 at 1:44 PM Christophe Leroy (CS GROUP) <[email protected]> wrote: > > > > Le 08/01/2026 à 20:02, Rob Herring a écrit : > > On Wed, Jan 07, 2026 at 05:59:10PM +0100, Christophe Leroy (CS GROUP) wrote: > >> The QUICC Engine provides interrupts for a few I/O ports. This is > >> handled via a separate interrupt ID and managed via a triplet of > >> dedicated registers hosted by the SoC. > >> > >> Implement an interrupt driver for it so that those IRQs can then > >> be linked to the related GPIOs. > >> > >> Signed-off-by: Christophe Leroy (CS GROUP) <[email protected]> > >> Acked-by: Conor Dooley <[email protected]> > > > > Already? On a v1? > > This is extracted from a previous series, here: > https://lore.kernel.org/all/67987bbf42344398709949cb53e3e8415260ec09.1758212309.git.christophe.le...@csgroup.eu/ > > Should I have called it v7 even if it is only a small part of the > initial series ?
Probably. Otherwise, b4 might think v6 is newer. Regardless, the history matters. > > Ack is here: > https://lore.kernel.org/all/20250818-babbling-studio-81a974afc169@spud/ > > > > >> --- > >> .../soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml | 51 +++++++++++++++++++ > >> 1 file changed, 51 insertions(+) > >> create mode 100644 > >> Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml > >> > >> diff --git > >> a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml > >> b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml > >> new file mode 100644 > >> index 0000000000000..1f3c652b1569d > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ports-ic.yaml > >> @@ -0,0 +1,51 @@ > >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >> +%YAML 1.2 > >> +--- > >> +$id: > >> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fsoc%2Ffsl%2Fcpm_qe%2Ffsl%2Cqe-ports-ic.yaml%23&data=05%7C02%7Cchristophe.leroy%40csgroup.eu%7C6e4c1b33836d4443b5c608de4ee86aff%7C8b87af7d86474dc78df45f69a2011bb5%7C0%7C0%7C639034957294961534%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=mH5SPbAw48C6BGcazDPJMtoiM71TXswUGBvSZf15dUQ%3D&reserved=0 > >> +$schema: > >> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C02%7Cchristophe.leroy%40csgroup.eu%7C6e4c1b33836d4443b5c608de4ee86aff%7C8b87af7d86474dc78df45f69a2011bb5%7C0%7C0%7C639034957294990994%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=RhD807Jcx3MerOAXGWuwgwHkATpTzTkDIQC7lO3t1AA%3D&reserved=0 > >> + > >> +title: Freescale QUICC Engine I/O Ports Interrupt Controller > >> + > >> +maintainers: > >> + - Christophe Leroy (CS GROUP) <[email protected]> > >> + > >> +properties: > >> + compatible: > >> + enum: > >> + - fsl,mpc8323-qe-ports-ic > >> + > >> + reg: > >> + maxItems: 1 > >> + > >> + interrupt-controller: true > >> + > >> + '#address-cells': > >> + const: 0 > >> + > >> + '#interrupt-cells': > >> + const: 1 > >> + > >> + interrupts: > >> + maxItems: 1 > >> + > >> +required: > >> + - compatible > >> + - reg > >> + - interrupt-controller > >> + - '#address-cells' > >> + - '#interrupt-cells' > >> + - interrupts > >> + > >> +additionalProperties: false > >> + > >> +examples: > >> + - | > >> + interrupt-controller@c00 { > >> + compatible = "fsl,mpc8323-qe-ports-ic"; > >> + reg = <0xc00 0x18>; > >> + interrupt-controller; > >> + #address-cells = <0>; > >> + #interrupt-cells = <1>; > >> + interrupts = <74 0x8>; > >> + interrupt-parent = <&ipic>; > > > > This doesn't look like a separate block, but just part of its parent. So > > just add interrupt-controller/#interrupt-cells to the parent. > > I don't understand what you mean, can you explain with the extract below ? > > Extract from device tree including the parent: > > soc8321@b0000000 { > #address-cells = <1>; > #size-cells = <1>; > device_type = "soc"; > compatible = "simple-bus"; > ranges = <0x0 0xb0000000 0x00100000>; > reg = <0xb0000000 0x00000200>; > bus-frequency = <0>; > > ipic:pic@700 { > interrupt-controller; > #address-cells = <0>; > #interrupt-cells = <2>; > reg = <0x700 0x100>; > device_type = "ipic"; > }; > > qepic:interrupt-controller@c00 { > compatible = "fsl,mpc8323-qe-ports-ic"; > reg = <0xc00 0x18>; > interrupt-controller; > #address-cells = <0>; > #interrupt-cells = <1>; > interrupts = <74 0x8>; > interrupt-parent = <&ipic>; There's not some overall QuiccEngine node/device? I guess that's qe@e0100000, so this is outside of it and is fine. Just move it to bindings/interrupt-controller/ since it is not part of anything else. Rob
